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Paper Abstract and Keywords
Presentation 2020-02-26 12:00
A controller augmentation method to reduce the number of untestable faults for multiplexers with n-inputs
Yuki Takeuchi, Toshinori Hosokawa, Hiroshi Yamazaki (Nihon Univ.), Masayoshi Yoshimura (Kyoto Sangyo Univ.) DC2019-90
Abstract (in Japanese) (See Japanese page) 
(in English) With the complexity for VLSIs, transition fault testing is required. However, VLSIs generally have more untestable transition faults than untestable stuck at faults due to the circuit structures. From the view point of structural testing, transition fault coverage might be insufficient and potential timing defects might be escaped. Therefore, design-for-testability to improve transition fault coverage is important. In this paper, we propose LOC test generation models to test control signal lines of multiplexers with n-inputs. The assignments of control signals for the LOC test generation models are realized by controller augmentation. Our experimental results for high-level benchmark circuits show that the proposed method achieved 100% fault coverage for transition faults in the data-paths.
Keyword (in Japanese) (See Japanese page) 
(in English) controller augmentation / test sensitization states / multiplexers / launch on capture / / / /  
Reference Info. IEICE Tech. Rep., vol. 119, no. 420, DC2019-90, pp. 25-30, Feb. 2020.
Paper # DC2019-90 
Date of Issue 2020-02-19 (DC) 
ISSN Online edition: ISSN 2432-6380
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
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Conference Information
Committee DC  
Conference Date 2020-02-26 - 2020-02-26 
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Paper Information
Registration To DC 
Conference Code 2020-02-DC 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) A controller augmentation method to reduce the number of untestable faults for multiplexers with n-inputs 
Sub Title (in English)  
Keyword(1) controller augmentation  
Keyword(2) test sensitization states  
Keyword(3) multiplexers  
Keyword(4) launch on capture  
1st Author's Name Yuki Takeuchi  
1st Author's Affiliation Nihon University (Nihon Univ.)
2nd Author's Name Toshinori Hosokawa  
2nd Author's Affiliation Nihon University (Nihon Univ.)
3rd Author's Name Hiroshi Yamazaki  
3rd Author's Affiliation Nihon University (Nihon Univ.)
4th Author's Name Masayoshi Yoshimura  
4th Author's Affiliation Kyoto Sangyo University (Kyoto Sangyo Univ.)
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Speaker Author-1 
Date Time 2020-02-26 12:00:00 
Presentation Time 25 minutes 
Registration for DC 
Paper # DC2019-90 
Volume (vol) vol.119 
Number (no) no.420 
Page pp.25-30 
Date of Issue 2020-02-19 (DC) 

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