IEICE Technical Committee Submission System
Conference Paper's Information
Online Proceedings
[Sign in]
Tech. Rep. Archives
 Go Top Page Go Previous   [Japanese] / [English] 

Paper Abstract and Keywords
Presentation 2021-01-29 13:40
Reducing chip area and improving efficiency of a charge pump by switching the input voltage source and controlling the number of stages
Shunsuke Hironaga, Takahide Sato, Satomi Ogawa (Yamanashi Univ) CAS2020-64 ICTSSL2020-49
Abstract (in Japanese) (See Japanese page) 
(in English) A step-up/step-down power supply circuit with a wide input/output voltage range, which has only one switch in its current path, is developed. In this paper, we propose a novel control of a charge pump which is used for an auxiliary power supply of a control circuit for the power supply circuit. The number of stages of the charge pump is reduced by switching the input voltage source when the power supply circuit starts up. In addition, the efficiency of the charge pump is improved by varying the number of stages depending on the input voltage. The efficiency of the charge pump has been confirmed by a simulation. The simulation results show that the efficiency is improved by up to 5.3 %.
Keyword (in Japanese) (See Japanese page) 
(in English) Power supply circuit / Charge Pump / Improving efficiency / Reducing chip area / / / /  
Reference Info. IEICE Tech. Rep., vol. 120, no. 346, CAS2020-64, pp. 130-135, Jan. 2021.
Paper # CAS2020-64 
Date of Issue 2021-01-21 (CAS, ICTSSL) 
ISSN Online edition: ISSN 2432-6380
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF CAS2020-64 ICTSSL2020-49

Conference Information
Committee CAS ICTSSL  
Conference Date 2021-01-28 - 2021-01-29 
Place (in Japanese) (See Japanese page) 
Place (in English) Online 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Students session, General session 
Paper Information
Registration To CAS 
Conference Code 2021-01-CAS-ICTSSL 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Reducing chip area and improving efficiency of a charge pump by switching the input voltage source and controlling the number of stages 
Sub Title (in English)  
Keyword(1) Power supply circuit  
Keyword(2) Charge Pump  
Keyword(3) Improving efficiency  
Keyword(4) Reducing chip area  
1st Author's Name Shunsuke Hironaga  
1st Author's Affiliation University of Yamanashi (Yamanashi Univ)
2nd Author's Name Takahide Sato  
2nd Author's Affiliation University of Yamanashi (Yamanashi Univ)
3rd Author's Name Satomi Ogawa  
3rd Author's Affiliation University of Yamanashi (Yamanashi Univ)
4th Author's Name  
4th Author's Affiliation ()
5th Author's Name  
5th Author's Affiliation ()
6th Author's Name  
6th Author's Affiliation ()
7th Author's Name  
7th Author's Affiliation ()
8th Author's Name  
8th Author's Affiliation ()
9th Author's Name  
9th Author's Affiliation ()
10th Author's Name  
10th Author's Affiliation ()
11th Author's Name  
11th Author's Affiliation ()
12th Author's Name  
12th Author's Affiliation ()
13th Author's Name  
13th Author's Affiliation ()
14th Author's Name  
14th Author's Affiliation ()
15th Author's Name  
15th Author's Affiliation ()
16th Author's Name  
16th Author's Affiliation ()
17th Author's Name  
17th Author's Affiliation ()
18th Author's Name  
18th Author's Affiliation ()
19th Author's Name  
19th Author's Affiliation ()
20th Author's Name  
20th Author's Affiliation ()
Speaker Author-1 
Date Time 2021-01-29 13:40:00 
Presentation Time 25 minutes 
Registration for CAS 
Paper # CAS2020-64, ICTSSL2020-49 
Volume (vol) vol.120 
Number (no) no.346(CAS), no.347(ICTSSL) 
Page pp.130-135 
Date of Issue 2021-01-21 (CAS, ICTSSL) 

[Return to Top Page]

[Return to IEICE Web Page]

The Institute of Electronics, Information and Communication Engineers (IEICE), Japan