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Paper Abstract and Keywords
Presentation 2021-06-09 13:00
[Invited Talk] Large-scale combinatorial optimization in real-time systems by FPGA-based accelerators for simulated bifurcation
Kosuke Tatsumura (TOSHIBA) RECONF2021-11
Abstract (in Japanese) (See Japanese page) 
(in English) Combinatorial optimization problems are economically valuable but computationally hard to solve. Many practical combinatorial optimizations can be converted to the ground-state search problems of Ising spin models. Simulated bifurcation (SB) is a quantum-inspired algorithm to solve these Ising problems. One of the remarkable features of SB is the high-degree parallelism, providing an opportunity for quickly solving those problems by massively parallel processing. In this article, we review our recent works on the design and implementation of high-performance FPGA-based accelerators for SB and their applications toward innovative real-time systems that make optimal responses to ever-changing situations. Also, we show a scale-out architecture for SB-based Ising machines with all-to-all spin-spin couplings that allows continued scaling of both machine size and computational throughput by connecting multiple chips.
Keyword (in Japanese) (See Japanese page) 
(in English) combinatorial optimization / Ising machine / quantum-inspired / simulated bifurcation / FPGA / / /  
Reference Info. IEICE Tech. Rep., vol. 121, no. 59, RECONF2021-11, pp. 56-61, June 2021.
Paper # RECONF2021-11 
Date of Issue 2021-06-01 (RECONF) 
ISSN Online edition: ISSN 2432-6380
Copyright
and
reproduction
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Notes on Review This article is a technical report without peer review, and its polished version will be published elsewhere.
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Conference Information
Committee RECONF  
Conference Date 2021-06-08 - 2021-06-09 
Place (in Japanese) (See Japanese page) 
Place (in English) Online 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Reconfigurable system, etc. 
Paper Information
Registration To RECONF 
Conference Code 2021-06-RECONF 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Large-scale combinatorial optimization in real-time systems by FPGA-based accelerators for simulated bifurcation 
Sub Title (in English)  
Keyword(1) combinatorial optimization  
Keyword(2) Ising machine  
Keyword(3) quantum-inspired  
Keyword(4) simulated bifurcation  
Keyword(5) FPGA  
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1st Author's Name Kosuke Tatsumura  
1st Author's Affiliation TOSHIBA CORPORATION (TOSHIBA)
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Speaker Author-1 
Date Time 2021-06-09 13:00:00 
Presentation Time 50 minutes 
Registration for RECONF 
Paper # RECONF2021-11 
Volume (vol) vol.121 
Number (no) no.59 
Page pp.56-61 
#Pages
Date of Issue 2021-06-01 (RECONF) 


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