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| Presentation | 2021-06-09 16:10 Development of the SYCL interface for FPGA clusters and evaluation of CPU-FPGA collaboration Satoshi Kaneko, Hiroyuki Takizawa (Tohoku Univ.), Kentaro Sano (RIKEN)  RECONF2021-15 |
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| Abstract | (in Japanese) | (See Japanese page) |
| (in English) | In this work, we develop a SYCL implementation as an abstraction layer for AFU Shell developed at RIKEN Center for Computational Science. The final goal of developing the abstraction layer is to allow HPC programmers to use multiple FPGA devices as one big accelerators for parallel computing without considering the physical hardware configuration. In this paper, we will describe the proposed programming environment and implementation, evaluate the performance, and discuss the expected performance gain by using the interconnect network directly connecting FPGA devices. | |
| Keyword | (in Japanese) | (See Japanese page) |
| (in English) | FPGA / SYCL / task-based / / / / / | |
| Reference Info. | IEICE Tech. Rep., vol. 121, no. 59, RECONF2021-15, pp. 80-86, June 2021. | |
| Paper # | RECONF2021-15 | |
| Date of Issue | 2021-06-01 (RECONF) | |
| ISSN | Online edition: ISSN 2432-6380 | |
| Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) | |
| Notes on Review | This article is a technical report without peer review, and its polished version will be published elsewhere. | |
| Download PDF | RECONF2021-15 |
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| Conference Information | |
| Committee | RECONF |
| Conference Date | 2021-06-08 - 2021-06-09 |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Online |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | Reconfigurable system, etc. |
| Paper Information | |
| Registration To | RECONF |
| Conference Code | 2021-06-RECONF |
| Language | Japanese |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Development of the SYCL interface for FPGA clusters and evaluation of CPU-FPGA collaboration |
| Sub Title (in English) | |
| Keyword(1) | FPGA |
| Keyword(2) | SYCL |
| Keyword(3) | task-based |
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| 1st Author's Name | Satoshi Kaneko |
| 1st Author's Affiliation | Tohoku University (Tohoku Univ.) |
| 2nd Author's Name | Hiroyuki Takizawa |
| 2nd Author's Affiliation | Tohoku University (Tohoku Univ.) |
| 3rd Author's Name | Kentaro Sano |
| 3rd Author's Affiliation | RIKEN (RIKEN) |
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| Speaker | Author-1 |
| Date Time | 2021-06-09 16:10:00 |
| Presentation Time | 25 minutes |
| Registration for | RECONF |
| Paper # | RECONF2021-15 |
| Volume (vol) | vol.121 |
| Number (no) | no.59 |
| Page | pp.80-86 |
| #Pages | 7 |
| Date of Issue | 2021-06-01 (RECONF) |
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