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Paper Abstract and Keywords
Presentation 2022-03-08 14:55
Evaluation of Side-channel Leaks Specific to Unrolled AES Hardware
Ayano Nakashima, Rei Ueno, Naofumi Homma (Tohoku Univ.) VLD2021-100 HWS2021-77
Abstract (in Japanese) (See Japanese page) 
(in English) This paper presents the evaluation of a unique side-channel leakage occurred from the middle rounds
of (pipelined) unrolled AES hardware. A full-round countermeasure is ideal for an unrolled implementation of
block ciphers. However, for reducing the large hardware overhead, only the vulnerable rounds should be protected.
Generally, the first and last rounds are vulnerable to side-channel attacks, and should be protected . In addition,
recently the first few rounds could also be attacked with the same amount of computation as the first round. This is
because the side channel leakage depending on the result of the first round occurs from the following rounds where
the input diffusion is not sufficient. This leakage is unique to unrolled implementation. In this paper we evaluate
the presence or absence of such a unique leakage from the middle rounds of unrolled AES hardware by CPA. In
particular, we propose a new power model to estimate the middle round leakage more accurately from the AES
first round intermediate values. The conventional model employs the Hamming Distance (HD) value corresponding
to the amount of the first round switching in order to perform CPAs with the middle round power consumption.
But we found that this was not applicable to the diffusion characteristics of AES. The proposed model classifies the
intermediate values directly by the difference value by an XOR operation in stead of the HD value, and considers the
estimated power value as the HD value given by the key-averaged pre-computation. We demonstrate through CPAs
with the proposed model that a unique side-channel leakage occurs even from the first several rounds of unrolled
AES hardware.
Keyword (in Japanese) (See Japanese page) 
(in English) Side-channel attacks / Block cipher / Unrolled implementation / AES / Differential power analysis / / /  
Reference Info. IEICE Tech. Rep., vol. 121, no. 413, HWS2021-77, pp. 135-140, March 2022.
Paper # HWS2021-77 
Date of Issue 2022-02-28 (VLD, HWS) 
ISSN Online edition: ISSN 2432-6380
Copyright
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reproduction
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF VLD2021-100 HWS2021-77

Conference Information
Committee VLD HWS  
Conference Date 2022-03-07 - 2022-03-08 
Place (in Japanese) (See Japanese page) 
Place (in English) Online 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Design Technology for System-on-Silicon, Hardware Security, etc. 
Paper Information
Registration To HWS 
Conference Code 2022-03-VLD-HWS 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Evaluation of Side-channel Leaks Specific to Unrolled AES Hardware 
Sub Title (in English)  
Keyword(1) Side-channel attacks  
Keyword(2) Block cipher  
Keyword(3) Unrolled implementation  
Keyword(4) AES  
Keyword(5) Differential power analysis  
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1st Author's Name Ayano Nakashima  
1st Author's Affiliation Tohoku University (Tohoku Univ.)
2nd Author's Name Rei Ueno  
2nd Author's Affiliation Tohoku University (Tohoku Univ.)
3rd Author's Name Naofumi Homma  
3rd Author's Affiliation Tohoku University (Tohoku Univ.)
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Speaker Author-1 
Date Time 2022-03-08 14:55:00 
Presentation Time 25 minutes 
Registration for HWS 
Paper # VLD2021-100, HWS2021-77 
Volume (vol) vol.121 
Number (no) no.412(VLD), no.413(HWS) 
Page pp.135-140 
#Pages
Date of Issue 2022-02-28 (VLD, HWS) 


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