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| Presentation | 2022-06-09 13:00 Hardware Implementation of Annealing Machine using Chaotic Boltzmann Machine Kanta Yoshioka (Kyutech), Ichiro Kawashima, Hakaru Tamukoh (Kyutech/Neumorph Center)  SIS2022-1 |
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| Abstract | (in Japanese) | (See Japanese page) |
| (in English) | With the end of Moore's law, annealing quantum computers that can solve various combinatorial optimization problems are attracting attention as next-generation computers. However, since quantum computers require large-scale computer facilities, the implementation of annealing machines using digital circuits and their commercial use are gaining popularity. In this study, we implemented an annealing machine using a chaotic Boltzmann machine, a model that is advantageous for hardware implementation. As a result, we implemented 2048 nodes, which is the largest implementation on a single FPGA board and found that it runs about 2.5 times faster than CPUs. | |
| Keyword | (in Japanese) | (See Japanese page) |
| (in English) | Simulated Annealing / FPGA / / / / / / | |
| Reference Info. | IEICE Tech. Rep., vol. 122, no. 62, SIS2022-1, pp. 1-6, June 2022. | |
| Paper # | SIS2022-1 | |
| Date of Issue | 2022-06-02 (SIS) | |
| ISSN | Online edition: ISSN 2432-6380 | |
| Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) | |
| Download PDF | SIS2022-1 |
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| Conference Information | |
| Committee | SIS IPSJ-AVM |
| Conference Date | 2022-06-09 - 2022-06-10 |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | KIT(Wakamatsu Campus) |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | Intelligent Multimedia Systems, Applied Embedded Systems, Three-Dimensional Image Technology (3DIT), etc. |
| Paper Information | |
| Registration To | SIS |
| Conference Code | 2022-06-SIS-AVM |
| Language | Japanese |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Hardware Implementation of Annealing Machine using Chaotic Boltzmann Machine |
| Sub Title (in English) | |
| Keyword(1) | Simulated Annealing |
| Keyword(2) | FPGA |
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| 1st Author's Name | Kanta Yoshioka |
| 1st Author's Affiliation | Kyushu Institute of Technology (Kyutech) |
| 2nd Author's Name | Ichiro Kawashima |
| 2nd Author's Affiliation | Kyushu Institute of Technology/Research Center for Neuromorphic AI Hardware (Kyutech/Neumorph Center) |
| 3rd Author's Name | Hakaru Tamukoh |
| 3rd Author's Affiliation | Kyushu Institute of Technology/Research Center for Neuromorphic AI Hardware (Kyutech/Neumorph Center) |
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| Speaker | Author-1 |
| Date Time | 2022-06-09 13:00:00 |
| Presentation Time | 20 minutes |
| Registration for | SIS |
| Paper # | SIS2022-1 |
| Volume (vol) | vol.122 |
| Number (no) | no.62 |
| Page | pp.1-6 |
| #Pages | 6 |
| Date of Issue | 2022-06-02 (SIS) |
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