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Paper Abstract and Keywords
Presentation 2022-08-08 15:20
Evaluation of IC Chip Response by Backside Voltage Disturbance in Flip Chip Packaging
Takuya Wadatsumi, Kohei Kawai, Rikuu Hasegawa (Kobe Univ.), Kikuo Muramatsu (e-SYNC), Hiromu Hasegawa, Takuya Sawada, Takahito Fukushima, Hisashi Kondo (Megachips), Takuji Miki, Makoto Nagata (Kobe Univ.) SDM2022-40 ICD2022-8
Abstract (in Japanese) (See Japanese page) 
(in English) Flip chip packaging has become a general technique for mounting semiconductor ICs due to the need for smaller area. However, the exposed backside of the IC can cause EMC problems such as permanent or temporary failures due to exposure to all kinds of disturbances. Furthermore, the risk of physical attacks that exploit EMC vulnerabilities is also considered to increase. In this study, a prototype chip was fabricated to quantitatively evaluate backside voltage disturbances. The prototype chip is equipped with an on-chip monitoring circuit created with a SAR ADC, which enables measurement of silicon substrate voltages at multiple locations. Voltage disturbances were actually injected from the backside, and the voltage waveforms on the chip surface and their position dependence were confirmed.
Keyword (in Japanese) (See Japanese page) 
(in English) Flip Chip Packaging / SAR ADC / Disturbance / Fault Injection / / / /  
Reference Info. IEICE Tech. Rep., vol. 122, no. 149, ICD2022-8, pp. 27-30, Aug. 2022.
Paper # ICD2022-8 
Date of Issue 2022-08-01 (SDM, ICD) 
ISSN Online edition: ISSN 2432-6380
Copyright
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reproduction
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF SDM2022-40 ICD2022-8

Conference Information
Committee ICD SDM ITE-IST  
Conference Date 2022-08-08 - 2022-08-10 
Place (in Japanese) (See Japanese page) 
Place (in English)  
Topics (in Japanese) (See Japanese page) 
Topics (in English) Analog, Mixed Analog and Digital, RF, and Sensor Interface, Low Voltage/Low Power Techniques, Novel Devices/Circuits, and the Applications 
Paper Information
Registration To ICD 
Conference Code 2022-08-ICD-SDM-IST 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Evaluation of IC Chip Response by Backside Voltage Disturbance in Flip Chip Packaging 
Sub Title (in English)  
Keyword(1) Flip Chip Packaging  
Keyword(2) SAR ADC  
Keyword(3) Disturbance  
Keyword(4) Fault Injection  
Keyword(5)  
Keyword(6)  
Keyword(7)  
Keyword(8)  
1st Author's Name Takuya Wadatsumi  
1st Author's Affiliation Kobe University (Kobe Univ.)
2nd Author's Name Kohei Kawai  
2nd Author's Affiliation Kobe University (Kobe Univ.)
3rd Author's Name Rikuu Hasegawa  
3rd Author's Affiliation Kobe University (Kobe Univ.)
4th Author's Name Kikuo Muramatsu  
4th Author's Affiliation e-SYNC Co., Ltd. (e-SYNC)
5th Author's Name Hiromu Hasegawa  
5th Author's Affiliation MegaChips Corp. (Megachips)
6th Author's Name Takuya Sawada  
6th Author's Affiliation MegaChips Corp. (Megachips)
7th Author's Name Takahito Fukushima  
7th Author's Affiliation MegaChips Corp. (Megachips)
8th Author's Name Hisashi Kondo  
8th Author's Affiliation MegaChips Corp. (Megachips)
9th Author's Name Takuji Miki  
9th Author's Affiliation Kobe University (Kobe Univ.)
10th Author's Name Makoto Nagata  
10th Author's Affiliation Kobe University (Kobe Univ.)
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Speaker Author-1 
Date Time 2022-08-08 15:20:00 
Presentation Time 25 minutes 
Registration for ICD 
Paper # SDM2022-40, ICD2022-8 
Volume (vol) vol.122 
Number (no) no.148(SDM), no.149(ICD) 
Page pp.27-30 
#Pages
Date of Issue 2022-08-01 (SDM, ICD) 


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