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Paper Abstract and Keywords
Presentation 2022-08-08 14:15
Evaluation of Steep Subthreshold Slope Device "Dual-gate type PN-body Tied SOI-FET" for Ultra-low Voltage Operation
Haruki Yonezaki, Jiro Ida, Takayuki Mori (KIT), Koichiro Ishibashi (UEC) SDM2022-38 ICD2022-6
Abstract (in Japanese) (See Japanese page) 
(in English) In this study, we report the first prototype results of a Steep SS "Dual-Gate (DG) PN-Body Tied (PNBT) SOI-FET" for extremely low-voltage operation. In our laboratory, we have proposed a "PN-Body Tied (PNBT) SOI-FET" with a steep Subthreshold Slope (SS) to realize CMOS integrated circuits with extremely low power consumption. However, it has been found that the PNBT SOI-FET requires a body voltage of about 0.7 V or higher to obtain a steep SS. It is also known that leakage current flows during turn-off. To solve these problems, a new structure of "Dual-Gate (DG) type PNBT SOI-FET" was proposed in our laboratory. As a result, we confirmed steep SS even in the DG-type PNBT SOI-FET. It was also found that the 1st gate voltage, which triggers steep SS, can be controlled by the 2nd gate.
Keyword (in Japanese) (See Japanese page) 
(in English) SOI-FET / Steep Subthreshold Slope / / / / / /  
Reference Info. IEICE Tech. Rep., vol. 122, no. 148, SDM2022-38, pp. 17-20, Aug. 2022.
Paper # SDM2022-38 
Date of Issue 2022-08-01 (SDM, ICD) 
ISSN Online edition: ISSN 2432-6380
Copyright
and
reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF SDM2022-38 ICD2022-6

Conference Information
Committee ICD SDM ITE-IST  
Conference Date 2022-08-08 - 2022-08-10 
Place (in Japanese) (See Japanese page) 
Place (in English)  
Topics (in Japanese) (See Japanese page) 
Topics (in English) Analog, Mixed Analog and Digital, RF, and Sensor Interface, Low Voltage/Low Power Techniques, Novel Devices/Circuits, and the Applications 
Paper Information
Registration To SDM 
Conference Code 2022-08-ICD-SDM-IST 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Evaluation of Steep Subthreshold Slope Device "Dual-gate type PN-body Tied SOI-FET" for Ultra-low Voltage Operation 
Sub Title (in English)  
Keyword(1) SOI-FET  
Keyword(2) Steep Subthreshold Slope  
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1st Author's Name Haruki Yonezaki  
1st Author's Affiliation Kanazawa Institute of Technology (KIT)
2nd Author's Name Jiro Ida  
2nd Author's Affiliation Kanazawa Institute of Technology (KIT)
3rd Author's Name Takayuki Mori  
3rd Author's Affiliation Kanazawa Institute of Technology (KIT)
4th Author's Name Koichiro Ishibashi  
4th Author's Affiliation The University of Electro-Communications (UEC)
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Speaker Author-1 
Date Time 2022-08-08 14:15:00 
Presentation Time 25 minutes 
Registration for SDM 
Paper # SDM2022-38, ICD2022-6 
Volume (vol) vol.122 
Number (no) no.148(SDM), no.149(ICD) 
Page pp.17-20 
#Pages 4 
Date of Issue 2022-08-01 (SDM, ICD) 

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