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Paper Abstract and Keywords
Presentation 2022-10-25 15:40
Hardware Acceleration of TFHE-based Adder by Controlling Error
Yinfan Zhao, Ikeda Makoto (Univ. of Tokyo) HWS2022-40 ICD2022-32
Abstract (in Japanese) (See Japanese page) 
(in English) Fully homomorphic encryption (FHE) is expected to be used in the secure delegating computation. The bootstrapping in the Fully homomorphic encryption over Torus (TFHE) is the fastest in all FHE schemes now, so compared with BGV scheme TFHE is more friendly in deep leveled computation situations. However, the speed of TFHE-based operation is too slow. For example, the TFHE-based 32-bit addition needs 2.9s. This design focuses on improving the speed of TFHE-based addition by new hardware structures. We propose an error-controlled method to construct bigger multi-input-output gates. Now, it is possible to build a 5-input gate with the same security level. Then, we optimize the process of blind rotation. Last, we optimize the key switching process to make the key smaller. The size of the new key switching key is 277 times smaller than the original one. From RTL simulation, a 32-bits TFHE-based adder will use 84.3ms, 34 times faster than the original scheme.
Keyword (in Japanese) (See Japanese page) 
(in English) Fully homomorphic encryption / TFHE / TFHE-based adders / Hardware accelerators / Error controlled / / /  
Reference Info. IEICE Tech. Rep., vol. 122, no. 228, ICD2022-32, pp. 58-63, Oct. 2022.
Paper # ICD2022-32 
Date of Issue 2022-10-18 (HWS, ICD) 
ISSN Online edition: ISSN 2432-6380
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All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF HWS2022-40 ICD2022-32

Conference Information
Committee HWS ICD  
Conference Date 2022-10-25 - 2022-10-25 
Place (in Japanese) (See Japanese page) 
Place (in English)  
Topics (in Japanese) (See Japanese page) 
Topics (in English) Hardware Security, etc. 
Paper Information
Registration To ICD 
Conference Code 2022-10-HWS-ICD 
Language English (Japanese title is available) 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Hardware Acceleration of TFHE-based Adder by Controlling Error 
Sub Title (in English)  
Keyword(1) Fully homomorphic encryption  
Keyword(2) TFHE  
Keyword(3) TFHE-based adders  
Keyword(4) Hardware accelerators  
Keyword(5) Error controlled  
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1st Author's Name Yinfan Zhao  
1st Author's Affiliation University of Tokyo (Univ. of Tokyo)
2nd Author's Name Ikeda Makoto  
2nd Author's Affiliation University of Tokyo (Univ. of Tokyo)
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Speaker Author-1 
Date Time 2022-10-25 15:40:00 
Presentation Time 25 minutes 
Registration for ICD 
Paper # HWS2022-40, ICD2022-32 
Volume (vol) vol.122 
Number (no) no.227(HWS), no.228(ICD) 
Page pp.58-63 
#Pages
Date of Issue 2022-10-18 (HWS, ICD) 


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