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Paper Abstract and Keywords
Presentation 2024-03-01 11:15
Investigation of electromagnetic irradiation noise reduction by on-chip LDOs
Rikuu Hasegawa, Kazuki Monta, Takuya Wadatsumi, Takuji Miki, Makoto Nagata (Kobe Univ.) VLD2023-124 HWS2023-84 ICD2023-113
Abstract (in Japanese) (See Japanese page) 
(in English) IC chips are subject to the threat of fault injection attacks, which cause circuit malfunctions (faults) by injecting illegal inputs or disturbances into the digital circuit while it is operating. If the attack target is a crypto circuit, the secret key, which is the secret information of the crypto circuit, can be analyzed by a fault analysis attack using the output (ciphertext) containing the fault. Therefore, it is considered important to take countermeasures against fault injection attacks. There are various methods of fault injection, such as laser irradiation, voltage/clock glitches, and electromagnetic irradiation. This paper analyzes the noise generated in the power supply wiring in a digital circuit during an electromagnetic fault injection (EMFI) attack, which is a fault injection attack by electromagnetic irradiation. For the noise analysis, we measured voltage fluctuations in the power supply wiring of digital circuits during EMFI using an on-chip monitor (OCM) circuit, which is a voltage monitoring circuit. In this case, two types of power supply methods to digital circuits were used: external power supply and LDO mounted on IC chips, and the possibility of LDO having a noise reduction effect.
Keyword (in Japanese) (See Japanese page) 
(in English) Digital circuit / Electromagnetic fault injection / EMFI / On-chip monitor circuit / OCM / LDO / /  
Reference Info. IEICE Tech. Rep., vol. 123, no. 391, HWS2023-84, pp. 131-134, Feb. 2024.
Paper # HWS2023-84 
Date of Issue 2024-02-21 (VLD, HWS, ICD) 
ISSN Online edition: ISSN 2432-6380
Copyright
and
reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF VLD2023-124 HWS2023-84 ICD2023-113

Conference Information
Committee VLD HWS ICD  
Conference Date 2024-02-28 - 2024-03-02 
Place (in Japanese) (See Japanese page) 
Place (in English)  
Topics (in Japanese) (See Japanese page) 
Topics (in English)  
Paper Information
Registration To HWS 
Conference Code 2024-02-VLD-HWS-ICD 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Investigation of electromagnetic irradiation noise reduction by on-chip LDOs 
Sub Title (in English)  
Keyword(1) Digital circuit  
Keyword(2) Electromagnetic fault injection  
Keyword(3) EMFI  
Keyword(4) On-chip monitor circuit  
Keyword(5) OCM  
Keyword(6) LDO  
Keyword(7)  
Keyword(8)  
1st Author's Name Rikuu Hasegawa  
1st Author's Affiliation Kobe University (Kobe Univ.)
2nd Author's Name Kazuki Monta  
2nd Author's Affiliation Kobe University (Kobe Univ.)
3rd Author's Name Takuya Wadatsumi  
3rd Author's Affiliation Kobe University (Kobe Univ.)
4th Author's Name Takuji Miki  
4th Author's Affiliation Kobe University (Kobe Univ.)
5th Author's Name Makoto Nagata  
5th Author's Affiliation Kobe University (Kobe Univ.)
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Speaker Author-1 
Date Time 2024-03-01 11:15:00 
Presentation Time 25 minutes 
Registration for HWS 
Paper # VLD2023-124, HWS2023-84, ICD2023-113 
Volume (vol) vol.123 
Number (no) no.390(VLD), no.391(HWS), no.392(ICD) 
Page pp.131-134 
#Pages 4 
Date of Issue 2024-02-21 (VLD, HWS, ICD) 

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