| Paper Abstract and Keywords |
| Presentation |
2024-08-08 16:20
Performance evaluation for directive-based parallelization code at the LLVM IR level Takumi Yanagida, Kanemitsu Ootsu, Takashi Yokota (Utsunomiya Univ.) CPSY2024-24 DC2024-24 RECONF2024-24 |
| Abstract |
(in Japanese) |
(See Japanese page) |
| (in English) |
Parallelization work is necessary to accelerate existing application programs using multi-core processors, but this work requires a great deal of effort. To solve this problem, we have developed a binary-level automatic parallelization system that parallelizes binary code via an intermediate representation (LLVM IR) of the LLVM compiler infrastructure. This system requires the generation of parallel code at the LLVM IR level. Therefore, we are developing a parallel code generation function that generates parallel IR code based on directives. However, the performance achieved by this system is not yet clear. In this paper, we evaluate the system using PolyBench/C in order to clarify the execution performance of the code generated by the parallel code generation function of this system. As a result of the evaluation, we confirmed that the IR-level parallelization program generated by the parallel code generation function achieved a higher speed-up rate than the source code-level parallelization program, and that this function has sufficient performance as a parallelization function of the binary-level automatic parallelization system. |
| Keyword |
(in Japanese) |
(See Japanese page) |
| (in English) |
LLVM / IR code / Parallelization / Directive / / / / |
| Reference Info. |
IEICE Tech. Rep., vol. 124, no. 148, CPSY2024-24, pp. 40-45, Aug. 2024. |
| Paper # |
CPSY2024-24 |
| Date of Issue |
2024-07-31 (CPSY, DC, RECONF) |
| ISSN |
Online edition: ISSN 2432-6380 |
Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
| Download PDF |
CPSY2024-24 DC2024-24 RECONF2024-24 |
| Conference Information |
| Committee |
CPSY DC RECONF IPSJ-ARC |
| Conference Date |
2024-08-07 - 2024-08-09 |
| Place (in Japanese) |
(See Japanese page) |
| Place (in English) |
Awagin Hall |
| Topics (in Japanese) |
(See Japanese page) |
| Topics (in English) |
SWoPP2024: Parallel, Distributed and Cooperative Processing Systems and Dependable Computing |
| Paper Information |
| Registration To |
CPSY |
| Conference Code |
2024-08-CPSY-DC-RECONF-ARC |
| Language |
Japanese |
| Title (in Japanese) |
(See Japanese page) |
| Sub Title (in Japanese) |
(See Japanese page) |
| Title (in English) |
Performance evaluation for directive-based parallelization code at the LLVM IR level |
| Sub Title (in English) |
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| Keyword(1) |
LLVM |
| Keyword(2) |
IR code |
| Keyword(3) |
Parallelization |
| Keyword(4) |
Directive |
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| 1st Author's Name |
Takumi Yanagida |
| 1st Author's Affiliation |
Utsunomiya University (Utsunomiya Univ.) |
| 2nd Author's Name |
Kanemitsu Ootsu |
| 2nd Author's Affiliation |
Utsunomiya University (Utsunomiya Univ.) |
| 3rd Author's Name |
Takashi Yokota |
| 3rd Author's Affiliation |
Utsunomiya University (Utsunomiya Univ.) |
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| Speaker |
Author-1 |
| Date Time |
2024-08-08 16:20:00 |
| Presentation Time |
25 minutes |
| Registration for |
CPSY |
| Paper # |
CPSY2024-24, DC2024-24, RECONF2024-24 |
| Volume (vol) |
vol.124 |
| Number (no) |
no.148(CPSY), no.149(DC), no.150(RECONF) |
| Page |
pp.40-45 |
| #Pages |
6 |
| Date of Issue |
2024-07-31 (CPSY, DC, RECONF) |