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Paper Abstract and Keywords
Presentation 2024-10-24 16:20
Statistical Capacitance Evaluation of Si Trench Capacitor Using Impedance Measurement Platform
Ryoya Nishimaki, Koga Saito, Takezo Mawaki, Rihito Kuroda (Tohoku Univ.) SDM2024-52
Abstract (in Japanese) (See Japanese page) 
(in English) A statistical capacitance evaluation of Si trench capacitors using the impedance measurement platform that enables high-speed and high-precision statistical capacitance measurement of device under tests (DUTs) formed in a 2D array is presented. Si trench capacitor is a 3D structured capacitor with enlarged surface areas formed by etching Si substrate compared to a planar capacitor. We formed Si trench capacitors on this platform as DUTs and achieved statistical capacitance measurements in the fF to pF range. In addition, we measured Si trench capacitors with different structures, and discussed the effect of the DUT structure on capacitance measurements.
Keyword (in Japanese) (See Japanese page) 
(in English) Capacitance Measurement / Trench Capacitor / Array Test Circuit / Platform / / / /  
Reference Info. IEICE Tech. Rep., vol. 124, no. 222, SDM2024-52, pp. 34-37, Oct. 2024.
Paper # SDM2024-52 
Date of Issue 2024-10-17 (SDM) 
ISSN Online edition: ISSN 2432-6380
Copyright
and
reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF SDM2024-52

Conference Information
Committee SDM  
Conference Date 2024-10-24 - 2024-10-24 
Place (in Japanese) (See Japanese page) 
Place (in English) NICHe, Tohoku Univ. 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Process Science and New Process Technology 
Paper Information
Registration To SDM 
Conference Code 2024-10-SDM 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Statistical Capacitance Evaluation of Si Trench Capacitor Using Impedance Measurement Platform 
Sub Title (in English)  
Keyword(1) Capacitance Measurement  
Keyword(2) Trench Capacitor  
Keyword(3) Array Test Circuit  
Keyword(4) Platform  
Keyword(5)  
Keyword(6)  
Keyword(7)  
Keyword(8)  
1st Author's Name Ryoya Nishimaki  
1st Author's Affiliation Tohoku University (Tohoku Univ.)
2nd Author's Name Koga Saito  
2nd Author's Affiliation Tohoku University (Tohoku Univ.)
3rd Author's Name Takezo Mawaki  
3rd Author's Affiliation Tohoku University (Tohoku Univ.)
4th Author's Name Rihito Kuroda  
4th Author's Affiliation Tohoku University (Tohoku Univ.)
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Speaker Author-1 
Date Time 2024-10-24 16:20:00 
Presentation Time 20 minutes 
Registration for SDM 
Paper # SDM2024-52 
Volume (vol) vol.124 
Number (no) no.222 
Page pp.34-37 
#Pages 4 
Date of Issue 2024-10-17 (SDM) 

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