| Paper Abstract and Keywords |
| Presentation |
2025-12-04 15:10
Estimating Causes of Defective Operation in Prototype Electronic Circuit Boards Through Automated Circuit Configuration Comparison Tetsuya Hayashi, Tsuyoshi Tanaka, Masak Endo, Kenji Terada, Shigeyoshi Ohno (PTU) R2025-52 |
| Abstract |
(in Japanese) |
(See Japanese page) |
| (in English) |
This study aims to digitalize the fault diagnosis process performed by instructors in engineering education. We propose a circuit diagram analysis method that automatically estimates both the presence and the causes of operational defects in electronic circuit prototype boards without requiring power activation. The causes of operational defects are categorized into three factors—disconnection, short circuit, and unexpected component output—and are inferred through comparative analyses from two perspectives: circuit structure and circuit behavior. Experimental validation using actual prototype boards demonstrated that the proposed method can accurately determine the presence of operational defects with high reliability. Furthermore, the results indicate the potential of this approach as an effective diagnostic support tool, even for circuits with complex configurations. |
| Keyword |
(in Japanese) |
(See Japanese page) |
| (in English) |
Circuit prototyped boards / Defect estimation / Troubleshooting / Schematic configuration comparison / Circuit operation comparison / / / |
| Reference Info. |
IEICE Tech. Rep., vol. 125, no. 268, R2025-52, pp. 19-24, Dec. 2025. |
| Paper # |
R2025-52 |
| Date of Issue |
2025-11-27 (R) |
| ISSN |
Online edition: ISSN 2432-6380 |
Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
| Download PDF |
R2025-52 |
| Conference Information |
| Committee |
R |
| Conference Date |
2025-12-04 - 2025-12-04 |
| Place (in Japanese) |
(See Japanese page) |
| Place (in English) |
Kikai-Shinko-Kaikan Bldg. |
| Topics (in Japanese) |
(See Japanese page) |
| Topics (in English) |
Reliability International Standard, Maintainability, Reliability General, Safety General |
| Paper Information |
| Registration To |
R |
| Conference Code |
2025-12-R |
| Language |
Japanese |
| Title (in Japanese) |
(See Japanese page) |
| Sub Title (in Japanese) |
(See Japanese page) |
| Title (in English) |
Estimating Causes of Defective Operation in Prototype Electronic Circuit Boards Through Automated Circuit Configuration Comparison |
| Sub Title (in English) |
|
| Keyword(1) |
Circuit prototyped boards |
| Keyword(2) |
Defect estimation |
| Keyword(3) |
Troubleshooting |
| Keyword(4) |
Schematic configuration comparison |
| Keyword(5) |
Circuit operation comparison |
| Keyword(6) |
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| Keyword(7) |
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| Keyword(8) |
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| 1st Author's Name |
Tetsuya Hayashi |
| 1st Author's Affiliation |
The Polytechnic University of Japan (PTU) |
| 2nd Author's Name |
Tsuyoshi Tanaka |
| 2nd Author's Affiliation |
The Polytechnic University of Japan (PTU) |
| 3rd Author's Name |
Masak Endo |
| 3rd Author's Affiliation |
The Polytechnic University of Japan (PTU) |
| 4th Author's Name |
Kenji Terada |
| 4th Author's Affiliation |
The Polytechnic University of Japan (PTU) |
| 5th Author's Name |
Shigeyoshi Ohno |
| 5th Author's Affiliation |
The Polytechnic University of Japan (PTU) |
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| Speaker |
Author-1 |
| Date Time |
2025-12-04 15:10:00 |
| Presentation Time |
25 minutes |
| Registration for |
R |
| Paper # |
R2025-52 |
| Volume (vol) |
vol.125 |
| Number (no) |
no.268 |
| Page |
pp.19-24 |
| #Pages |
6 |
| Date of Issue |
2025-11-27 (R) |