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Paper Abstract and Keywords
Presentation 2026-03-17 11:15
Modifying Fault Injection Timing to Reduce Key Candidates in AES Fault Injection Attacks
Koki Miyata, Yuichi Futa (TUT), Hiroyuki Okazaki (Shinshu Univ.), Takehiko Mieno (EPSON AVASYS) IT2025-125 ISEC2025-133 WBS2025-107 RCC2025-106
Abstract (in Japanese) (See Japanese page) 
(in English) Countermeasures against Fault Injection Attacks are essential, because their attacks pose a threat to theoretically secure encryption algorithms. Tamagawa et al. demonstrated a method for fault injection attacks on general-purpose microcontroller boards. However, their method requires modifying the target AES program.

We previously succeeded in reducing some of these constraints by using a function generator. However, due to an insufficient variety of fault ciphertexts, approximately $1046^3$ key candidates remained.

In this report, we search additional fault ciphertexts by injecting faults into operations other than the SubBytes step targeted in prior research. As a result, we discovered a fault ciphertext that enable further reduction of the key space.
Keyword (in Japanese) (See Japanese page) 
(in English) Hardware security / Side-channel attacks / Fault-injection analysis / / / / /  
Reference Info. IEICE Tech. Rep., vol. 125, no. 405, ISEC2025-133, pp. 298-305, March 2026.
Paper # ISEC2025-133 
Date of Issue 2026-03-09 (IT, ISEC, WBS, RCC) 
ISSN Online edition: ISSN 2432-6380
Copyright
and
reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF IT2025-125 ISEC2025-133 WBS2025-107 RCC2025-106

Conference Information
Committee IT WBS ISEC RCC  
Conference Date 2026-03-16 - 2026-03-17 
Place (in Japanese) (See Japanese page) 
Place (in English) Nagano Campus, Shinshu University 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Joint Workshop of ISEC, IT, RCC, and WBS 
Paper Information
Registration To ISEC 
Conference Code 2026-03-IT-WBS-ISEC-RCC 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Modifying Fault Injection Timing to Reduce Key Candidates in AES Fault Injection Attacks 
Sub Title (in English)  
Keyword(1) Hardware security  
Keyword(2) Side-channel attacks  
Keyword(3) Fault-injection analysis  
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1st Author's Name Koki Miyata  
1st Author's Affiliation Tokyo University of Technology (TUT)
2nd Author's Name Yuichi Futa  
2nd Author's Affiliation Tokyo University of Technology (TUT)
3rd Author's Name Hiroyuki Okazaki  
3rd Author's Affiliation Shinshu University (Shinshu Univ.)
4th Author's Name Takehiko Mieno  
4th Author's Affiliation EPSON AVASYS CORPORATION (EPSON AVASYS)
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Speaker Author-1 
Date Time 2026-03-17 11:15:00 
Presentation Time 25 minutes 
Registration for ISEC 
Paper # IT2025-125, ISEC2025-133, WBS2025-107, RCC2025-106 
Volume (vol) vol.125 
Number (no) no.404(IT), no.405(ISEC), no.406(WBS), no.407(RCC) 
Page pp.298-305 
#Pages 8 
Date of Issue 2026-03-09 (IT, ISEC, WBS, RCC) 

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