Information: Join today and make your research activities more affordable! Technical workshop participation fees and annual registration fees are available at member rates.
Notice: [Important] Announcement of Changes to Registration Fee Payment and Manuscript Upload Procedures for IEICE Technical Meetings
IEICE Technical Committee Submission System
Conference Paper's Information		 Online Proceedings
[Sign in]
Tech. Rep. Archives
 Go Top Page Go Previous   [Japanese] / [English] 

Paper Abstract and Keywords
Presentation 2026-04-17 14:00
Analysis and Evaluation of Side-Channel Attack by Backside of Si-substrate Voltage of Crypt IC Chip
Rikuu Hasegawa (Kobe Univ.), Kazuki Monta, Takuya Wadatsumi (Secafy), Makoto Nagata (Kobe Univ.) HWS2026-1
Abstract (in Japanese) (See Japanese page) 
(in English) Crypto IC chips are vulnerable to side-channel attacks, which aim to extract secret information from internal circuit operations by exploiting unintentionally generated physical information during crypto processing. Also, semiconductor packaging technologies have shifted from conventional face-up packaging using wire bonding to flip-chip packaging employing ball grid arrays. This transition is driven by advantages such as reduced footprint and compatibility with advanced packaging technologies. However, the adoption of flip-chip packaging exposes the si-substrate on the backside of the chip, thereby introducing a new potential attack surface that did not exist in conventional implementations. In this study, we analyze and evaluate side-channel attacks exploiting backside si-substrate voltage on a crypto test chip that integrates multiple AES cores and is implemented using flip-chip packaging. We demonstrate that side-channel leakage through the si-substrate voltage may exhibit spatial locality.
Keyword (in Japanese) (See Japanese page) 
(in English) Side-channel attack / Face up implementation / Si-substrate backside voltage / AES / / / /  
Reference Info. IEICE Tech. Rep., vol. 126, no. 4, HWS2026-1, pp. 1-5, April 2026.
Paper # HWS2026-1 
Date of Issue 2026-04-10 (HWS) 
ISSN Online edition: ISSN 2432-6380
Copyright
and
reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF HWS2026-1

Conference Information
Committee HWS  
Conference Date 2026-04-17 - 2026-04-17 
Place (in Japanese) (See Japanese page) 
Place (in English) Toyama Kenmin Kaikan 
Topics (in Japanese) (See Japanese page) 
Topics (in English)  
Paper Information
Registration To HWS 
Conference Code 2026-04-HWS 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Analysis and Evaluation of Side-Channel Attack by Backside of Si-substrate Voltage of Crypt IC Chip 
Sub Title (in English)  
Keyword(1) Side-channel attack  
Keyword(2) Face up implementation  
Keyword(3) Si-substrate backside voltage  
Keyword(4) AES  
Keyword(5)  
Keyword(6)  
Keyword(7)  
Keyword(8)  
1st Author's Name Rikuu Hasegawa  
1st Author's Affiliation Kobe University (Kobe Univ.)
2nd Author's Name Kazuki Monta  
2nd Author's Affiliation Secafy Co., Ltd. (Secafy)
3rd Author's Name Takuya Wadatsumi  
3rd Author's Affiliation Secafy Co., Ltd. (Secafy)
4th Author's Name Makoto Nagata  
4th Author's Affiliation Kobe University (Kobe Univ.)
5th Author's Name  
5th Author's Affiliation ()
6th Author's Name  
6th Author's Affiliation ()
7th Author's Name  
7th Author's Affiliation ()
8th Author's Name  
8th Author's Affiliation ()
9th Author's Name  
9th Author's Affiliation ()
10th Author's Name  
10th Author's Affiliation ()
11th Author's Name  
11th Author's Affiliation ()
12th Author's Name  
12th Author's Affiliation ()
13th Author's Name  
13th Author's Affiliation ()
14th Author's Name  
14th Author's Affiliation ()
15th Author's Name  
15th Author's Affiliation ()
16th Author's Name  
16th Author's Affiliation ()
17th Author's Name  
17th Author's Affiliation ()
18th Author's Name  
18th Author's Affiliation ()
19th Author's Name  
19th Author's Affiliation ()
20th Author's Name  
20th Author's Affiliation ()
21st Author's Name  
21st Author's Affiliation ()
22nd Author's Name  
22nd Author's Affiliation ()
23rd Author's Name  
23rd Author's Affiliation ()
24th Author's Name  
24th Author's Affiliation ()
25th Author's Name  
25th Author's Affiliation ()
26th Author's Name / /
26th Author's Affiliation ()
()
27th Author's Name / /
27th Author's Affiliation ()
()
28th Author's Name / /
28th Author's Affiliation ()
()
29th Author's Name / /
29th Author's Affiliation ()
()
30th Author's Name / /
30th Author's Affiliation ()
()
31st Author's Name / /
31st Author's Affiliation ()
()
32nd Author's Name / /
32nd Author's Affiliation ()
()
33rd Author's Name / /
33rd Author's Affiliation ()
()
34th Author's Name / /
34th Author's Affiliation ()
()
35th Author's Name / /
35th Author's Affiliation ()
()
36th Author's Name / /
36th Author's Affiliation ()
()
Speaker Author-1 
Date Time 2026-04-17 14:00:00 
Presentation Time 25 minutes 
Registration for HWS 
Paper # HWS2026-1 
Volume (vol) vol.126 
Number (no) no.4 
Page pp.1-5 
#Pages 5 
Date of Issue 2026-04-10 (HWS) 

[Return to Top Page]

[Return to IEICE Web Page]
The Institute of Electronics, Information and Communication Engineers (IEICE), Japan