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Paper Abstract and Keywords
Presentation 2026-06-29 14:05
[Invited Talk] Fabrication of high quality Ge-on-Insulator based on Ge-on-Nothing technology
Keisuke Yamamoto (Kumamoto Univ.), Dong Wang (Kyushu Univ.), Roger Loo, Clément Porret, Valérie Depauw (imec), Jinyoun Cho, Kristof Dessein (Umicore) SDM2026-17
Abstract (in Japanese) (See Japanese page) 
(in English) Ge has superior characteristics such as high carrier mobilities and a near-infrared corresponding bandgap. For the practical application of Ge, Ge-on-Insulator (GOI) structure is essential. However, the Smart-Cut™ method used to fabricate Si-on-Insulator (SOI) poses challenges due to crystal defects induced by ion implantation. In this report, we introduce a new GOI fabrication technique using a hollow Ge structure (Ge-on-Nothing: GeON) as the starting material. The GOI formed by direct bonding of GeON to a Si handle substrate and layer transfer exhibited higher crystallinity and electrical properties compared to Smart-CutTM GOI. We believe this method is a viable approach for fabricating high-quality GOI.
Keyword (in Japanese) (See Japanese page) 
(in English) Ge-on-Insulator / Ge-on-Nothing / wafer bonding / MOSFET / / / /  
Reference Info. IEICE Tech. Rep., vol. 126, no. 89, SDM2026-17, pp. 5-8, June 2026.
Paper # SDM2026-17 
Date of Issue 2026-06-22 (SDM) 
ISSN Online edition: ISSN 2432-6380
Copyright
and
reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF SDM2026-17

Conference Information
Committee SDM  
Conference Date 2026-06-29 - 2026-06-29 
Place (in Japanese) (See Japanese page) 
Place (in English) TCU Shibuya PXU 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Material and Process Technologies Driving Semiconductor Device Evolution: Frontiers in MOS, Memory, and Power Devices 
Paper Information
Registration To SDM 
Conference Code 2026-06-SDM 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Fabrication of high quality Ge-on-Insulator based on Ge-on-Nothing technology 
Sub Title (in English)  
Keyword(1) Ge-on-Insulator  
Keyword(2) Ge-on-Nothing  
Keyword(3) wafer bonding  
Keyword(4) MOSFET  
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1st Author's Name Keisuke Yamamoto  
1st Author's Affiliation Kumamoto University (Kumamoto Univ.)
2nd Author's Name Dong Wang  
2nd Author's Affiliation Kyushu University (Kyushu Univ.)
3rd Author's Name Roger Loo  
3rd Author's Affiliation imec (imec)
4th Author's Name Clément Porret  
4th Author's Affiliation imec (imec)
5th Author's Name Valérie Depauw  
5th Author's Affiliation imec (imec)
6th Author's Name Jinyoun Cho  
6th Author's Affiliation Umicore (Umicore)
7th Author's Name Kristof Dessein  
7th Author's Affiliation Umicore (Umicore)
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Speaker Author-1 
Date Time 2026-06-29 14:05:00 
Presentation Time 35 minutes 
Registration for SDM 
Paper # SDM2026-17 
Volume (vol) vol.126 
Number (no) no.89 
Page pp.5-8 
#Pages 4 
Date of Issue 2026-06-22 (SDM) 

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