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Technical Committee on Silicon Device and Materials (SDM) (Searched in: 2012)
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Search Results: Keywords 'from:2013-02-04 to:2013-02-04'
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Search Results: Conference Papers |
Conference Papers (Available on Advance Programs) (Sort by: Date Ascending) |
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Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
SDM |
2013-02-04 10:05 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
Improved Thermal Conductivity by Vertical Graphene Contact Formation for Thermal TSV Akio Kawabata, Mizuhisa Nihei, Tomo Murakam, Motonobu Sato, Naoki Yokoyama (AIST) SDM2012-150 |
This paper reports the tailoring thermal conductivity of novel dense vertical and horizontal graphene (DVHG) structures,... [more] |
SDM2012-150 pp.1-4 |
SDM |
2013-02-04 10:45 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
CuSn/InAu microbump induced local deformation and mechanical stress in high-density 3D-LSI Murugesan Murugesan, Mitsumasa Koyanagi (Tohoku Univ.) SDM2012-151 |
[more] |
SDM2012-151 pp.5-8 |
SDM |
2013-02-04 11:25 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
* Takashi Kurusu, Hiroyoshi Tanimoto, Makoto Wada, Atsunobu Isobayashi, Akihiro Kajita, Nobutoshi Aoki, Yoshiaki Toyoshima (Toshiba) |
[more] |
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SDM |
2013-02-04 13:10 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
Smart interconnect technology using atom switch for low-power programmable Logic Munehiro Tada, Toshitsugu Sakamoto, Makoto Miyamura, Naoki Banno, Koichiro Okamoto, Noriyuki Iguchi, Hiromitsu Hada (LEAP) SDM2012-152 |
Multi-level interconnect technology in ULSI is now facing the difficulty of the scaling limit. “BEOL devices” having a n... [more] |
SDM2012-152 pp.9-14 |
SDM |
2013-02-04 13:50 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
Nano-ordered Evaluation for Local Distribution of Adhesion Strength Between Cu/Dielectric in LSI Circuit S.Kamiya, Hisashi Sato (Nagoya Inst. of Tech.), Masaki Omiya (Keio Univ.), Nobuyuki Shishido, Kozo Koiwa, Masahiro Nishida (Nagoya Inst. of Tech.), Tomoji Nakamura, Takashi Suzuki (Fujitsu Labs), Takeshi Nokuo, Toshiaki Suzuki (JEOL) SDM2012-153 |
One of serious problems for LSI is the weakness of interfaces in Cu/dielectric systems along with the trend of further m... [more] |
SDM2012-153 pp.15-20 |
SDM |
2013-02-04 14:30 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
Wafer-level Chip Scale Package for White LED with High Thermal Dissipation Yosuke Akimoto, Akihiro Kojima, Miyoko Shimada, Hideyuki Tomizawa, Hideto Furuyama, Susumu Obata, Kazuhito Higuchi, Yoshiaki Sugizaki, Hideki Shibata (Toshiba) SDM2012-154 |
We proposed a novel wafer-level chip scale packaging technology for white LED, which enables high thermal dissipation fo... [more] |
SDM2012-154 pp.21-24 |
SDM |
2013-02-04 15:25 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
High Reliability Technology of Fine Pitch Re-wiring for High Density Chip Package
-- Cu Re-wiring Covering with Metal-Cap Barrier Technology -- Tsuyoshi Kanki, Junya Ikeda, Shoichi Suda, Yasushi Kobayashi, Yoshihiro Nakata, Tomoji Nakamura (Fujitsu Labs) SDM2012-155 |
In advancing minimization of Cu re-wiring for highly dense chip package at lower cost, the vital technology is to suppre... [more] |
SDM2012-155 pp.25-30 |
SDM |
2013-02-04 16:05 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
Novel Seed Layer Formation Using Electroless Copper Deposition For High Aspect Ratio TSV Fumihiro Inoue, Shoso Shingubara (Kansai Univ.), Harold Philipsen (IMEC) SDM2012-156 |
[more] |
SDM2012-156 pp.31-34 |
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