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Technical Committee on Reconfigurable Systems (RECONF) (Searched in: 2013)
Search Results: Keywords 'from:2013-05-20 to:2013-05-20'
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| RECONF | 2013-05-20 14:00 |
Kochi | Kochi Prefectural Culture Hall | [Keynote Address]
Challenging Connect6 Hardware Design Competitions Kentaro Sano (Tohoku Univ.)  RECONF2013-1 |
[more] | RECONF2013-1 pp.1-6 |
| RECONF | 2013-05-20 15:00 |
Kochi | Kochi Prefectural Culture Hall | An FPGA Implementation of the Progressive Tree Neighborhood Algorithm
-- Phylogenetic Tree Reconstruction with Maximum Parsimony -- Henry Block, Tsutomu Maruyama (Univ. of Tsukuba) RECONF2013-2 |
In this paper, we present an FPGA-hardware implementation for the progressive tree neighborhood algorithm applied to phy... [more] | RECONF2013-2 pp.7-12 |
| RECONF | 2013-05-20 15:25 |
Kochi | Kochi Prefectural Culture Hall | Implementation and Evaluation of Data Compression Hardware for Bandwidth Enhancement of Multiple Data Streams Tomohiro Ueno, Yoshiaki Kono, Kentaro Sano, Satoru Yamamoto (Tohoku Univ.) RECONF2013-3 |
[more] | RECONF2013-3 pp.13-18 |
| RECONF | 2013-05-20 15:50 |
Kochi | Kochi Prefectural Culture Hall | FPGA Acceleration of Short Read Mapping Yoko Sogabe, Tsutomu Maruyama (Univ. of Tsukuba) RECONF2013-4 |
The rapid development of Next Generation Sequencing has enabled to generate more than 100 billion base pairs per day fro... [more] | RECONF2013-4 pp.19-24 |
| RECONF | 2013-05-20 16:25 |
Kochi | Kochi Prefectural Culture Hall | Speed-up of Dynamically Reconfigurable Processor Array Toru Katagiri, Hideharu Amano (Keio Univ.) RECONF2013-5 |
In order to achieve a high performance on the Dynamically Reconfigurable Processor Array (DRPA), it is common to increas... [more] | RECONF2013-5 pp.25-30 |
| RECONF | 2013-05-20 16:50 |
Kochi | Kochi Prefectural Culture Hall | Proposal of a Dependable Fine-grained Reconfigurable Device with ECC Technology Yuki Yoshida, Kentaro Takaki, Kazuya Tanigawa, Tetsuo Hironaka (Hiroshima City Univ.), Kenichi Shimomai, Takashi Ishiguro (TAIYO YUDEN) RECONF2013-6 |
Soft errors by cosmic rays and noise in a Field Programmable Gate Array (FPGA) are getting a big problem since the semic... [more] | RECONF2013-6 pp.31-36 |
| RECONF | 2013-05-20 17:15 |
Kochi | Kochi Prefectural Culture Hall | An optically reconfigurable gate array using a temperature dependable holographic memory Retsu Moriwaki, Minoru Watanabe (Shizuoka Univ.), Akifumi Ogiwara (Kobe City College of Tech.) RECONF2013-7 |
[more] | RECONF2013-7 pp.37-40 |
| RECONF | 2013-05-20 17:40 |
Kochi | Kochi Prefectural Culture Hall | Flexible reliability mixed-grained reconfigurable architecture supporting behavioral synthesis Hiroaki Konoura, Dawood Alnajjar (Osaka Univ.), Yukio Mitsuyama (Kochi Univ. Tech.), Hiroyuki Ochi (Ritsumeikan Univ.), Takashi Imagawa (Kyoto Univ.), Shinichi Noda, Kazutoshi Wakabayashi (NEC), Masanori Hashimoto, Takao Onoye (Osaka Univ.) RECONF2013-8 |
This paper proposes a mixed-grained reconfigurable architecture that supports C-based behavioral synthesis and flexibl... [more] |
RECONF2013-8 pp.41-46 |
| RECONF | 2013-05-21 09:00 |
Kochi | Kochi Prefectural Culture Hall | [Invited Talk]
A Challenge of Acceleration of DA Algorithm by Parallel Processing Michiaki Muraoka (Kochi Univ.) RECONF2013-9 |
[more] | RECONF2013-9 p.47 |
| RECONF | 2013-05-21 10:10 |
Kochi | Kochi Prefectural Culture Hall | Design and Evaluation of FPGA-based ASIC Emulator using High-speed Serial Communication Takashige Uda, Morihiro Kuga, Motoki Amagasaki, Masahiro Iida, Toshinori Sueyoshi (Kumamoto Univ.) RECONF2013-10 |
Recently, development period of ASIC is longer becouse of the increase in circuit scale. Verification process accounts ... [more] |
RECONF2013-10 pp.49-54 |
| RECONF | 2013-05-21 10:35 |
Kochi | Kochi Prefectural Culture Hall | Implementation of Speculative Gather System for CMA Rie Uno, Nobuaki Ozaki, Mai Izawa, Akihito Tsusaka, Takaaki Miyajima, Hideharu Amano (Keio Univ.) RECONF2013-11 |
Cool Mega Array (CMA) is a low power reconfigurable processor array for battery driven mobile devices. A prototype chip ... [more] | RECONF2013-11 pp.55-60 |
| RECONF | 2013-05-21 11:00 |
Kochi | Kochi Prefectural Culture Hall | Performance model evaluation for 3-D stencil computation using a high-level synthesis tool Keisuke Dohi, Yoshihiro Nakamura, Yuichiro Shibata, Kiyoshi Oguri (Nagasaki Univ.) RECONF2013-12 |
In this paper, we evaluate a performance model for heat spreading simulation on a MaxCompiler, a kind of high- -level s... [more] |
RECONF2013-12 pp.61-66 |
| RECONF | 2013-05-21 11:25 |
Kochi | Kochi Prefectural Culture Hall | A defect-robust FPGA-IP core architecture Motoki Amagasaki, Kazuki Inoue, Qian Zhao, Masahiro Iida, Morihiro Kuga, Toshinori Sueyoshi (Kumamoto Univ.) RECONF2013-13 |
In this paper, we propose fault-tolerant FPGA -IP cores for system LSI. Unlike discrete FPGAs, in which the integration... [more] |
RECONF2013-13 pp.67-72 |
| RECONF | 2013-05-21 13:20 |
Kochi | Kochi Prefectural Culture Hall | Video based real-time feature extraction and abnormal action detection on an FPGA Kaoru Hamasaki, Keisuke Dohi, Yuichiro Shibata, Kiyoshi Oguri (Nagasaki Univ) RECONF2013-14 |
[more] | RECONF2013-14 pp.73-78 |
| RECONF | 2013-05-21 13:45 |
Kochi | Kochi Prefectural Culture Hall | FAST COMPUTATION OF THE OPTICAL FLOW USING FPGA Yu Tanabe, Tsutomu Maruyama (Univ. of Tsukuba) RECONF2013-15 |
In this report, we describe an approach for fast and accurate optical flow estimation using FPGA. The computational comp... [more] | RECONF2013-15 pp.79-84 |
| RECONF | 2013-05-21 14:10 |
Kochi | Kochi Prefectural Culture Hall | An FPGA-based Sound Synthesizer and its GUI Suguru Ochiai, Yoshiki Yamaguchi, Yuetsu Kodama (Univ. of Tsukuba) RECONF2013-16 |
Digital synthesizers have laid the groundwork for the significant advances in sound computing and it spreads worldwide. ... [more] | RECONF2013-16 pp.85-90 |
| RECONF | 2013-05-21 14:45 |
Kochi | Kochi Prefectural Culture Hall | Performance Evaluation of Physical Unclonable FUnctions on Kintex-7 FPGA Yohei Hori, Toshihiro Katashita, Kazukuni Kobara (AIST) RECONF2013-17 |
The challenge-response properties of Physical Unclonable Functions (PUFs) on 28-nm process FPGA on the ten SASEBO-GIII ... [more] |
RECONF2013-17 pp.91-96 |
| RECONF | 2013-05-21 15:10 |
Kochi | Kochi Prefectural Culture Hall | Study of Runtime Binary Acceleration on TCA node Takaaki Miyajima, Takuya Kuhara (Keio Univ.), Toshihiro Hanawa (Univ. of Tsukuba), David Thomas (Imperial College), Hideharu Amano (Keio Univ.) RECONF2013-18 |
We are developing Toolchain and Domain Specific Language for Runtime Binary Acceleration, called Courier and Trailblaze... [more] |
RECONF2013-18 pp.97-102 |
| RECONF | 2013-05-21 15:35 |
Kochi | Kochi Prefectural Culture Hall | The 3-D fluid computation on an FPGA system Kenta Fujinami, Yoshiki Yamaguchi, Yuetsu Kodama (Univ. of Tsukuba) RECONF2013-19 |
(To be available after the conference date) [more] | RECONF2013-19 pp.103-108 |
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