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Chair |
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Tomohiro Yoneda (NII) |
Vice Chair |
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Seiji Kajihara (Kyushu Inst. of Tech.) |
Secretary |
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Masato Kitagami (Chiba Univ.), Michinobu Nakao (Renesas) |
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Conference Date |
Fri, Jun 25, 2010 13:30 - 16:45 |
Topics |
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Conference Place |
Kikai-Shinko-Kaikan |
Transportation Guide |
http://www.jspmi.or.jp/mapright.htm |
Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
Fri, Jun 25 PM 13:30 - 15:00 |
(1) |
13:30-14:00 |
A Full Scan Design Method for Asynchronous Sequential Circuits Based on C-element Scan Paths DC2010-8 |
Hiroshi Iwata, Satoshi Ohtake, Michiko Inoue, Hideo Fujiwara (NAIST) |
(2) |
14:00-14:30 |
A Class of Partial Thru Testable Sequential Circuits with Multiplexers DC2010-9 |
Nobuya Oka, Yuki Yoshikawa, Hideyuki Ichihara, Tomoo Inoue (Hiroshima City Univ.) |
(3) |
14:30-15:00 |
A Binding Algorithm in High-Level Synthesis for Robust Testable Datapaths DC2010-10 |
Yuki Yoshikawa, Shun Maruya, Hideyuki Ichihara, Tomoo Inoue (Hiroshima City Univ.) |
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15:00-15:15 |
Break ( 15 min. ) |
Fri, Jun 25 PM 15:15 - 16:45 |
(4) |
15:15-15:45 |
A test pattern matching method on BAST architecture using don't care identification for the detection of random pattern resistant faults DC2010-11 |
Yun Chen, Toshinori Hosokawa (Nihon Univ.), Masayoshi Yoshimura (Kyushu Univ.) |
(5) |
15:45-16:15 |
Note on Insertion Point and Area of Observation Circuit for On-Chip Debug Technique DC2010-12 |
Masayuki Arai, Yoshihiro Tabata, Kazuhiko Iwasaki (Tokyo Metro. Univ.) |
(6) |
16:15-16:45 |
An I/O Sequence Slicing Method for Post-silicon Debugging DC2010-13 |
Yeonbok Lee, Takeshi Matsumoto, Masahiro Fujita (Univ. of Tokyo.) |
Announcement for Speakers |
General Talk | Each speech will have 20 minutes for presentation and 10 minutes for discussion. |
Contact Address and Latest Schedule Information |
DC |
Technical Committee on Dependable Computing (DC) [Latest Schedule]
|
Contact Address |
Masato Kitakami
Graduate School of Advanced Integration Science,
Chiba University
1-33 Yayoi-cho Inage-ku, Chiba 263-8522 JAPAN
TEL/FAX +43.290.3039
E-:fultyba-u |
Last modified: 2010-04-17 00:47:06
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