Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
SDM |
2014-01-29 09:35 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
[Invited Talk]
Carrier response in band gap and multiband transport in bilayer grapheme under the ultra-high displacement Kosuke Nagashio, K Kanayama, Tomonori Nishimura, Akira Toriumi (Univ. of Tokyo) SDM2013-135 |
[more] |
SDM2013-135 pp.1-4 |
SDM |
2014-01-29 10:00 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
[Invited Talk]
Reconsideration of Electron Mobility in Ge n-MOSFETs from Ge Substrate Side ChoongHyun Lee, Tomonori Nishimura, T Tabata, Cimang Lu, W F Zhang, Kosuke Nagashio, Akira Toriumi (Univ. of Tokyo) SDM2013-136 |
We clarified wafer-related origins for electron mobility degradation in Ge n-MOSFETs. High-Ns electron mobility was dram... [more] |
SDM2013-136 pp.5-8 |
SDM |
2014-01-29 10:25 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
[Invited Talk]
High Electron Mobility Triangular InGaAs-OI nMOSFETs with (111)B Side Surfaces Formed by MOVPE Regrowth Toshifumi Irisawa, Minoru Oda, Keiji Ikeda, Yoshihiko Moriyama, Eiko Mieda, Wipakorn. Jevasuwan, Tatsuro Maeda (AIST), Osamu Ichikawa, Takenori Osada, Masahiko Hata (Sumitomo Chemical), Yasuyuki Miyamoto (Tokyo Inst. of Tech.), Tsutomu Tezuka (AIST) SDM2013-137 |
riangular In0.53Ga0.47As-OI nMOSFETs with smooth (111)B side surfaces on Si have been successfully fabricated. The trian... [more] |
SDM2013-137 pp.9-12 |
SDM |
2014-01-29 10:50 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
[Invited Talk]
Heated Ion Implantation Technology for Highly Reliable Metal-gate/High-k CMOS SOI FinFETs Wataru Mizubayashi (AIST), Hiroshi Onoda, Yoshiki Nakashima (Nissin Ion Equipment), Yuki Ishikawa, Takashi Matsukawa, Kazuhiko Endo, Yongxun Liu, Shinichi Ouchi, Junichi Tsukada, Hiromi Yamauchi, Shinji Migita, Yukinori Morita, Hiroyuki Ota, Meishoku Masahara (AIST) SDM2013-138 |
The impact of heated ion implantation (I/I) technology on metal-gate (MG)/high-k (HK) CMOS SOI FinFET performance and re... [more] |
SDM2013-138 pp.13-16 |
SDM |
2014-01-29 11:15 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
[Invited Talk]
Integration of III-V Nanowires on Si : From High-Performance Vertical FET to Steep-Slope Switch Katsuhiro Tomioka (Hokkaido Univ./JST-PRESTO), Takashi Fukui (Hokkaido Univ.) SDM2013-139 |
[more] |
SDM2013-139 pp.17-22 |
SDM |
2014-01-29 13:05 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
[Invited Talk]
Future Prospects of MRAM Technologies Shinji Yuasa, Akio Fukushima, Kay Yakushiji, Takayuki Nozaki, Makoto Konoto, Hiroki Maehara, Hitoshi Kubota, Tomohiro Taniguchi, Hiroko Arai, Hiroshi Imamura, Koji Ando (AIST), Yoichi Shiota, Frederic Bonnel, Yoshishige Suzuki (Osaka Univ.), Naoharu Shimomura (Toshiba) SDM2013-140 |
[more] |
SDM2013-140 pp.23-28 |
SDM |
2014-01-29 13:30 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
[Invited Talk]
Variable Nonvolatile Memory Arrays for Adaptive Computing Systems Hiroki Noguchi, Susumu Takeda, Kumiko Nomura, Keiko Abe, Kazutaka Ikegami, Eiji Kitagawa, Naoharu Shimomura, Junichi Ito, Shinobu Fujita (Toshiba) SDM2013-141 |
[more] |
SDM2013-141 p.29 |
SDM |
2014-01-29 13:55 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
[Invited Talk]
Analysis of Transistor Characteristics in Distribution Tails beyond ±5.4σ of 11 Billion Transistors Tomoko Mizutani, Anil Kumar, Toshiro Hiramoto (Univ. of Tokyo) SDM2013-142 |
Transistors in distribution tails of 11G (11 billion) transistors were intensively measured and compared with transistor... [more] |
SDM2013-142 pp.31-34 |
SDM |
2014-01-29 14:40 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
[Invited Talk]
Suppression of Die-to-Die Delay Variability of Silicon on Thin Buried Oxide (SOTB) CMOS Circuits by Balanced P/N Drivability Control with Back-Bias for Ultralow-Voltage (0.4 V) Operation Hideki Makiyama, Yoshiki Yamamoto, Hirofumi Shinohara, Toshiaki Iwamatsu, Hidekazu Oda, Nobuyuki Sugii (LEAP), Koichiro Ishibashi (Univ. of Electro- Comm.), Tomoko Mizutani, Toshiro Hiramoto (Univ. of Tokyo), Yasuo Yamaguchi (LEAP) SDM2013-143 |
Small-variability transistors such as silicon on thin buried oxide (SOTB) are effective for reducing the operation volta... [more] |
SDM2013-143 pp.35-38 |
SDM |
2014-01-29 15:05 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
[Invited Talk]
High Performance Sub-20-nm-Channel-Length Extremely-Thin Body InAs-on-Insulator Tri-Gate MOSFETs with High Short Channel Effect Immunity and Vth Tunability S. H. Kim, Masafumi Yokoyama, Ryosho Nakane (Univ. of Tokyo), Osamu Ichikawa, Takenori Osada, Masahiko Hata (Sumitomo Chemical), Mitsuru Takenaka, Shinichi Takagi (Univ. of Tokyo) SDM2013-144 |
[more] |
SDM2013-144 pp.39-42 |
SDM |
2014-01-29 15:30 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
[Invited Talk]
3D Integrated CMOS Device by Using Wafer Stacking and Via-last TSV Mayu Aoki, Futoshi Furuta, Kazuyuki Hozawa, Yuko Hanaoka, Kenichi Takeda (Hitachi) SDM2013-145 |
A three-layer-stacked wafer with CMOS devices was fabricated for the first time by using hybrid wafer bonding and backsi... [more] |
SDM2013-145 pp.43-46 |
SDM |
2014-01-29 15:55 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
[Invited Talk]
Three-dimensional Structures for High Saturation Signals and Crosstalk Suppression in 1.20 μm Pixel Back-Illuminated CMOS Image Sensor Takekazu Shinohara, Kazufumi Watanabe (Sony Semiconductor), Kazunobu Ohta (Sony), Hajime Nakayama (Sony Semiconductor), Takafumi Morikawa (Sony), Keiichi Ohno, Dai Sugimoto (Sony Semiconductor), Shingo Kadomura, Teruo Hirayama (Sony) SDM2013-146 |
We propose two technologies, vertical transfer gate (VTG) and buried shielding metal (BSM), that can be applied to 1.20 ... [more] |
SDM2013-146 pp.47-50 |