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Technical Committee on Dependable Computing (DC) [schedule] [select]
Chair Tatsuhiro Tsuchiya (Osaka Univ.)
Vice Chair Toshinori Hosokawa (Nihon Univ.)
Secretary Masayuki Arai (Nihon Univ.), Kazuteru Namba (Chiba Univ.)

Conference Date Wed, Feb 28, 2024 10:30 - 16:30
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All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Registration Fee This workshop will be held as the IEICE workshop in fully electronic publishing. Registration fee will be necessary except the speakers and participants other than the participants to workshop(s) in non-electronic publishing. See the registration fee page. We request the registration fee or presentation fee to participants who will attend the workshop(s) on DC.

Wed, Feb 28 AM 
10:30 - 11:45
(1) 10:30-10:55 A Low Power Multi Bit Passive ΔΣ Modulator for Wearable Devices DC2023-94 Naoya Maruyama, Satoshi Komatsu (Tokyo Denki Univ.)
(2) 10:55-11:20 System design using DICE-based edge-triggered soft-error-tolerant D-FF DC2023-95 Kazuteru Namba (Chiba Univ.)
(3) 11:20-11:45 DC2023-96
  11:45-13:15 Break ( 90 min. )
Wed, Feb 28 PM 
13:15 - 14:30
(4) 13:15-13:40 A Study on Test Generation for Alleviating Over-testing of Approximate Multipliers DC2023-97 Qilin Wang, Hideyuki Ichihara, Tomoo Inoue (Hiroshima City Univ.)
(5) 13:40-14:05 Test Point Selection Method for Multi-Cycle BIST Using Deep Reinforcement Learning DC2023-98 Kohei Shiotani, Tatsuya Nishikawa, Shaoqi Wei, Senling Wang, Hiroshi Kai, Yoshinobu Higami, Hiroshi Takahashi (Ehime Univ.)
(6) 14:05-14:30 A Low Power Oriented Multiple Target Test Generation Method for 2 Cycle Gate-Exhaustive Faults Using Pseudo Boolean Optimization DC2023-99 Momona Mizota, Toshinori Hosokawa (Nihon Univ), Masayoshi Yoshimura (Kyouto Sangyou Uni), Masayuki Arai (Nihon Univ)
  14:30-14:40 Break ( 10 min. )
Wed, Feb 28 PM 
14:40 - 15:30
(7) 14:40-15:05 DC2023-100
(8) 15:05-15:30 Locating High Power Consuming Area by Branch and Reconvergence Topology Analysis for Logic Circuit DC2023-101 Tomoya Yamashita, Kohei Miyase, Xiaoqing Wen (Kyutech)
  15:30-15:40 Break ( 10 min. )
Wed, Feb 28 PM 
15:40 - 16:30
(9) 15:40-16:05 On Additional Status Signal Sequences Generation to Improve Estimated Field Random Testability for Datapaths at Register Transfer Level DC2023-102 Yudai Toyooka, Toshinori Hosokawa (Nihon Univ.), Masayoshi Yoshimura (Kyoto Sangyo Univ.)
(10) 16:05-16:30 DC2023-103

Announcement for Speakers
General TalkEach speech will have 20 minutes for presentation and 5 minutes for discussion.

Contact Address and Latest Schedule Information
DC Technical Committee on Dependable Computing (DC)   [Latest Schedule]
Contact Address Masayuki Arai (College of Industrial Technology, Nihon Univ.)
E--mail: ain-u 


Last modified: 2024-02-20 13:23:35


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