Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
RECONF, CPSY, VLD, IPSJ-SLDM |
2008-01-17 12:55 |
Kanagawa |
Hiyoshi Campus, Keio University |
Analysis of retention time under continuous reconfiguration of a DORGA Daisaku Seto, Minoru Watanabe (Shizuoka Univ.) VLD2007-125 CPSY2007-68 RECONF2007-71 |
[more] |
VLD2007-125 CPSY2007-68 RECONF2007-71 pp.43-47 |
RECONF, CPSY, VLD, IPSJ-SLDM |
2008-01-17 13:20 |
Kanagawa |
Hiyoshi Campus, Keio University |
A fast optical reconfiguration experiment of a dynamic optically reconfigurable gate array Mao Nakajima, Minoru Watanabe (Shizuoka Univ.) VLD2007-126 CPSY2007-69 RECONF2007-72 |
[more] |
VLD2007-126 CPSY2007-69 RECONF2007-72 pp.49-52 |
RECONF, CPSY, VLD, IPSJ-SLDM |
2008-01-17 13:45 |
Kanagawa |
Hiyoshi Campus, Keio University |
Fault tolerance analysis for holographic memories in optically reconfigurable gate arrays. Kouji Shinohara, Minoru Watanabe (Shizuoka Univ.) VLD2007-127 CPSY2007-70 RECONF2007-73 |
[more] |
VLD2007-127 CPSY2007-70 RECONF2007-73 pp.53-57 |
RECONF, CPSY, VLD, IPSJ-SLDM |
2008-01-17 14:10 |
Kanagawa |
Hiyoshi Campus, Keio University |
A Tile Based Dynamically Reconfigurable Architecture with Dual ALU-array/RISC Processor Operating Mode Capability Shin'ichi Kouyama, Masayuki Hiromoto, Hiroyuki Ochi (Kyoto Univ.), Yukihiro Nakamura (Ritsumeikan Univ.) VLD2007-128 CPSY2007-71 RECONF2007-74 |
[more] |
VLD2007-128 CPSY2007-71 RECONF2007-74 pp.59-64 |
RECONF, CPSY, VLD, IPSJ-SLDM |
2008-01-17 14:35 |
Kanagawa |
Hiyoshi Campus, Keio University |
Functionally-partitioned JPEG decoder for partial dynamic reconfiguration Taiichiro Yatsunami, Hideaki Yoshihiro, Morihiro Kuga, Toshinori Sueyoshi (Kumamoto Univ.) VLD2007-129 CPSY2007-72 RECONF2007-75 |
[more] |
VLD2007-129 CPSY2007-72 RECONF2007-75 pp.65-70 |
RECONF, CPSY, VLD, IPSJ-SLDM |
2008-01-17 15:00 |
Kanagawa |
Hiyoshi Campus, Keio University |
A Method for Saving and Restoring Context Data of Hardware Tasks on the Dynamically Reconfigurable Processor Vu Manh Tuan, Hideharu Amano (Keio Univ.) VLD2007-130 CPSY2007-73 RECONF2007-76 |
[more] |
VLD2007-130 CPSY2007-73 RECONF2007-76 pp.71-76 |
RECONF, CPSY, VLD, IPSJ-SLDM |
2008-01-17 15:35 |
Kanagawa |
Hiyoshi Campus, Keio University |
An L1 Data Cache Optimization Algorithm for Application Processor Cores Nobuaki Tojo, Nozomu Togawa, Masao Yanagisawa, Tatsuo Ohtsuki (Waseda Univ.) VLD2007-131 CPSY2007-74 RECONF2007-77 |
One major factor in improving the performance of embedded processors is the use of data and instruction caches.
In this... [more] |
VLD2007-131 CPSY2007-74 RECONF2007-77 pp.77-82 |
RECONF, CPSY, VLD, IPSJ-SLDM |
2008-01-17 16:00 |
Kanagawa |
Hiyoshi Campus, Keio University |
A Processor Kernel Generation Method for Application Processors Toshihiro Hiura, Shunitsu Kohara, Nozomu Togawa, Masao Yanagisawa, Tatsuo Ohtsuki (Waseda Univ.) VLD2007-132 CPSY2007-75 RECONF2007-78 |
This paper proposes a processor kernel generation method for HW/SW co-design system named SPADES. SPADES is a system to ... [more] |
VLD2007-132 CPSY2007-75 RECONF2007-78 pp.83-88 |
RECONF, CPSY, VLD, IPSJ-SLDM |
2008-01-17 16:25 |
Kanagawa |
Hiyoshi Campus, Keio University |
A Hybrid Design Space Exploration Approach for a Coarse-Grained Reconfigurable Accelerator Farhad Mehdipour (Kyushu Univ.), Hamid Noori (ISIT), Hiroaki Honda, Koji Inoue, Kazuaki Murakami (Kyushu Univ.) VLD2007-133 CPSY2007-76 RECONF2007-79 |
Multitude parameters involved in the design process of a reconfigurable accelerator which is exploited in embedded syste... [more] |
VLD2007-133 CPSY2007-76 RECONF2007-79 pp.89-94 |
RECONF, CPSY, VLD, IPSJ-SLDM |
2008-01-17 16:50 |
Kanagawa |
Hiyoshi Campus, Keio University |
VLIW Extension of Software Development Environment Construction Tool ArchC Takanori Morimoto (Kwansei Gakuin Univ.), Takahiro Kumura (NEC), Nagisa Ishiura (Kwansei Gakuin Univ.), Masao Ikekawa (NEC), Masaharu Imai (Osaka Univ.) VLD2007-134 CPSY2007-77 RECONF2007-80 |
ArchC is a C++/SystemC-based open-source software,which generates software development environments (consisting of Binut... [more] |
VLD2007-134 CPSY2007-77 RECONF2007-80 pp.95-100 |
RECONF, CPSY, VLD, IPSJ-SLDM |
2008-01-17 17:15 |
Kanagawa |
Hiyoshi Campus, Keio University |
Hardware Consious Style: a C Language Style for Hardware Design Kaiyi Mao, Hideharu Amano, Satoshi Tsutsumi, Vasutan Tunbunheng (Keio Univ.) VLD2007-135 CPSY2007-78 RECONF2007-81 |
In order to cope with recent complicated functions in multi-media applications, C-based behavioral design method has bee... [more] |
VLD2007-135 CPSY2007-78 RECONF2007-81 pp.101-106 |
RECONF, CPSY, VLD, IPSJ-SLDM |
2008-01-17 17:40 |
Kanagawa |
Hiyoshi Campus, Keio University |
C to HDL compiler for rapid HW-SW co-simulation models Yasuhiro Ito, Yutaka Sugawara, Kei Hiraki (Tokyo Univ.) VLD2007-136 CPSY2007-79 RECONF2007-82 |
The importance of verification for embedded systems increases as the scale of circuit and complexity of software increas... [more] |
VLD2007-136 CPSY2007-79 RECONF2007-82 pp.107-112 |