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Technical Committee on Reconfigurable Systems (RECONF)  (Searched in: 2015)

Search Results: Keywords 'from:2016-01-19 to:2016-01-19'
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Search Results: Conference Papers
 Conference Papers (Available on Advance Programs)  (Sort by: Date Ascending)
 Results 21 - 34 of 34 [Previous]  /   
Committee Date Time Place Paper Title / Authors Abstract Paper #
VLD, CPSY, RECONF, IPSJ-SLDM, IPSJ-ARC [detail] 2016-01-20
17:00		 Kanagawa Hiyoshi Campus, Keio University Latency Reduction on Inter-Component Communication across Racks using FSO
Hiroaki Hara, Tomoya Ozaki (Keio Univ.), Michihiro Koibuchi (NII), Hideharu Amano, Hiroki Matsutani (Keio Univ.) VLD2015-97 CPSY2015-129 RECONF2015-79		 (To be available after the conference date) [more] VLD2015-97 CPSY2015-129 RECONF2015-79
pp.161-166
VLD, CPSY, RECONF, IPSJ-SLDM, IPSJ-ARC [detail] 2016-01-21
09:00		 Kanagawa Hiyoshi Campus, Keio University Performance Improvement on Music Fingerprint Searching from Large-Scale Database by Using Probabilistic Bias
Masahiro Fukuda, Yasushi Inoguchi (JAIST) VLD2015-98 CPSY2015-130 RECONF2015-80		 Recent Internet provides a field activating the distribution of music, while it is also a hotbed of illegal copies. This... [more] VLD2015-98 CPSY2015-130 RECONF2015-80
pp.167-172
VLD, CPSY, RECONF, IPSJ-SLDM, IPSJ-ARC [detail] 2016-01-21
09:25		 Kanagawa Hiyoshi Campus, Keio University Discussion on FPGA implementation of real-time human detection using FIND features
Yoshiki Hayashida, Masahito Oishi, Ryo Fujita, Yuichiro Shibata, Kiyoshi Oguri (Nagasaki Univ.) VLD2015-99 CPSY2015-131 RECONF2015-81		 In this paper, we discuss FPGA implementation of image-based human
detection using the feature interaction descriptor ... [more]		 VLD2015-99 CPSY2015-131 RECONF2015-81
pp.173-178
VLD, CPSY, RECONF, IPSJ-SLDM, IPSJ-ARC [detail] 2016-01-21
09:50		 Kanagawa Hiyoshi Campus, Keio University FPGA Implementation of a Peak Detection System using AMPD Algorithm
Fumihiko Iwasaki, Yuichiro Shibata, Kiyoshi Oguri (Nagasaki Univ) VLD2015-100 CPSY2015-132 RECONF2015-82		 Peak detection of time-series data is widely used in various
applications. A demand for implementation of low-latency... [more]		 VLD2015-100 CPSY2015-132 RECONF2015-82
pp.179-184
VLD, CPSY, RECONF, IPSJ-SLDM, IPSJ-ARC [detail] 2016-01-21
10:30		 Kanagawa Hiyoshi Campus, Keio University Power Optimization of a Reconfigurable Accelerator by Middle-grained Body Bias Control
Yusuke Matsushita, Hayate Okuhara, Koichiro Masuyama, Yu Fujita, Hideharu Amano (Keio Univ.) VLD2015-101 CPSY2015-133 RECONF2015-83		 (To be available after the conference date) [more] VLD2015-101 CPSY2015-133 RECONF2015-83
pp.185-190
VLD, CPSY, RECONF, IPSJ-SLDM, IPSJ-ARC [detail] 2016-01-21
10:55		 Kanagawa Hiyoshi Campus, Keio University Power Reduction of TLB using Body Bias Control on SOTB
Daiki Kawase, Hayate Okuhara, Hideharu Amano (Keio Univ.) VLD2015-102 CPSY2015-134 RECONF2015-84		 SOTB(Silicon on thin buried oxide) MOSFET is one of the FD-SOI device with 10nm BOX layer. SOTB
effectively reduces the... [more]		 VLD2015-102 CPSY2015-134 RECONF2015-84
pp.191-196
VLD, CPSY, RECONF, IPSJ-SLDM, IPSJ-ARC [detail] 2016-01-21
11:20		 Kanagawa Hiyoshi Campus, Keio University An Architectural Optimization for Software Defined SSD using Full System Simulator
Shun Gokita, Satoshi Kazama, Seiki Shibata, Shinya Kuwamura, Eiji Yoshida, Junji Ogawa (FLL) VLD2015-103 CPSY2015-135 RECONF2015-85		 In recent years, a kind of software-defined SSD which has a Flash control layer (FTL) in software teared out of hardware... [more] VLD2015-103 CPSY2015-135 RECONF2015-85
pp.197-202
VLD, CPSY, RECONF, IPSJ-SLDM, IPSJ-ARC [detail] 2016-01-21
13:00		 Kanagawa Hiyoshi Campus, Keio University Mainframe Assembly to C translation in Legacy Migration
Daisuke Fujiwara, Nagisa Ishiura, Ryo Sakai (Kwansei Gakuin Univ.), Ryo Aoki, Takashi Ogawara (SYSTEM'S) VLD2015-104 CPSY2015-136 RECONF2015-86		 This article presents a method of translating mainframe assembly programs to C programs. In ``legacy migration,'' where ... [more] VLD2015-104 CPSY2015-136 RECONF2015-86
pp.203-208
VLD, CPSY, RECONF, IPSJ-SLDM, IPSJ-ARC [detail] 2016-01-21
13:25		 Kanagawa Hiyoshi Campus, Keio University A floorplan-driven high-level synthesis algorithm resilient to dynamic delay variations
Koki Igawa, Masao Yanagisawa, Nozomu Togawa (Waseda Univ.) VLD2015-105 CPSY2015-137 RECONF2015-87		 Recently, we have proposed a multi-scenario high-level synthesis algorithm targeting static process variations. The algo... [more] VLD2015-105 CPSY2015-137 RECONF2015-87
pp.209-214
VLD, CPSY, RECONF, IPSJ-SLDM, IPSJ-ARC [detail] 2016-01-21
13:50		 Kanagawa Hiyoshi Campus, Keio University Binary Synthesis Implementing External Interrupt Handler as Independent Module
Naoya Ito, Nagisa Ishiura (Kwansei Gakuin Univ.), Hiroyuki Tomiyama (Ritsumeikan Univ.), Hiroyuki Kanbara (ASTEM) VLD2015-106 CPSY2015-138 RECONF2015-88		  [more] VLD2015-106 CPSY2015-138 RECONF2015-88
pp.215-220
VLD, CPSY, RECONF, IPSJ-SLDM, IPSJ-ARC [detail] 2016-01-21
14:15		 Kanagawa Hiyoshi Campus, Keio University Write-Reduction using Encoding data on MLC for Non-Volatile Memories
Masashi Tawada, Shinji Kimura, Masao Yanagisawa, Nozomu Togawa (Waseda Univ.) VLD2015-107 CPSY2015-139 RECONF2015-89		 There is a movement to use the non-volatile memory to the important main memory in von Neumann computer.
Non-volatile m... [more]		 VLD2015-107 CPSY2015-139 RECONF2015-89
pp.221-225
VLD, CPSY, RECONF, IPSJ-SLDM, IPSJ-ARC [detail] 2016-01-21
14:55		 Kanagawa Hiyoshi Campus, Keio University A Realization of Deep Convolutional Neural Network using the Nested RNS on an FPGA including the Constant Division
Hiroki Nakahara (Ehime Univ.), Tsutomu Sasao (Meiji Univ.), Hisashi Iwamoto (REVSONIC Corp.) VLD2015-108 CPSY2015-140 RECONF2015-90		  [more] VLD2015-108 CPSY2015-140 RECONF2015-90
pp.227-232
VLD, CPSY, RECONF, IPSJ-SLDM, IPSJ-ARC [detail] 2016-01-21
15:20		 Kanagawa Hiyoshi Campus, Keio University Implementation of TRAX Solver with Mate Structure
Yasuhiro Takashima, Takaaki Yahata, Saki Yamaguchi, Komei Nomura (Univ. of Kitakyushu) VLD2015-109 CPSY2015-141 RECONF2015-91		  [more] VLD2015-109 CPSY2015-141 RECONF2015-91
pp.233-236
VLD, CPSY, RECONF, IPSJ-SLDM, IPSJ-ARC [detail] 2016-01-21
15:45		 Kanagawa Hiyoshi Campus, Keio University Search of Evaluation Function with Genetic Algorithm and UML Model-based Development for TRAX Player
Ryo Tamaki, Naohiko Shimizu (Tokai Univ.) VLD2015-110 CPSY2015-142 RECONF2015-92		 In this paper, We present the game tree search and the hardware design for the TRAX player. The TRAX player searches the... [more] VLD2015-110 CPSY2015-142 RECONF2015-92
pp.237-242
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