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Committee Date Time Place Paper Title / Authors Abstract Paper #
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]		 2013-11-29
13:20		 Kagoshima   NoC routers using the marching memory through type
Ryota Yasudo, Takahiro Kagami, Hideharu Amano (Keio Univ.), Yasunobu Nakase, Masashi Watanabe, Tsukasa Oishi, Toru Shimizu (Renesas), Tadao Nakamura (Keio Univ.) CPSY2013-71		 We propose a NoC(Network-on Chip) router using the marching memory through type in order to reduce the power consumption... [more] CPSY2013-71
pp.71-76
CPSY, DC
(Joint)		 2009-08-04
- 2009-08-05		 Miyagi   *
Yu Kojima (Keio Univ.), Hiroki Matsutani (Univ. of Tokyo), Michihiro Koibuchi (NII), Hideharu Amano (Keio Univ.) CPSY2009-24		 We evaluate and propose a low-power method based on error-tolerant techniques in order to reduce the supply voltage whil... [more] CPSY2009-24
pp.85-90
CPSY, DC
(Joint)		 2009-08-04
- 2009-08-05		 Miyagi   A robust on-chip asynchronous data-transfer scheme based on multi-level current-mode signalling
Naoya Onizawa, Atsushi Matsumoto, Takahiro Hanyu (Tohoku Univ.), Tomohiro Yoneda (NII) DC2009-18		 This paper presents a robust on-chip asynchronous data-trasnfer circuit based on multi-level current-mode signalling und... [more] DC2009-18
pp.1-6
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