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Committee Date Time Place Paper Title / Authors Abstract Paper #
SDM, ED 2009-02-27
11:20		 Hokkaido Hokkaido Univ. Observation of Stochastic Resonance in Nanodevice-integrated Systems Utilizing GaAs-based Nanowire Network and Its Analysis
Seiya Kasai (Hokkaido Univ/JST), Tetsuya Asai, Yuta Shiratori, Hong-Quan Zhao (Hokkaido Univ.) ED2008-237 SDM2008-229		 Stochastic resonance, in which response of a system is improved by adding noise, is successfully observed using field ef... [more] ED2008-237 SDM2008-229
pp.75-79
SDM, ED 2008-07-10
10:00		 Hokkaido Kaderu２・７ 2-bit Arithmetic Logic Unit Utilizing Hexagonal BDD Architecture for Implemention of Nanoprocessor on GaAs Nanowire Network
Hong-Quan Zhao (Hokkaido Univ.), Seiya Kasai (Hokkaido Univ./JST), Tamotsu Hashizume (Hokkaido Univ.) ED2008-66 SDM2008-85		 2-bit arithmetic logic unit (ALU) utilizing the binary-decision diagram (BDD) logic architecture for nanoprocessor is fa... [more] ED2008-66 SDM2008-85
pp.139-144
ED, SDM 2008-01-31
11:15		 Hokkaido   Implementation of active and sequential circuits on GaAs-based nanowire network structures controlled by Schottky wrap gates
Seiya Kasai (Hokkaido Univ., JST), Hong-Quan Zhao, Tamotsu Hashizume (Hokkaido Univ.) ED2007-249 SDM2007-260		 Implementation of active and sequential circuits on semiconductor-based nanowire networks with a specific topology and p... [more] ED2007-249 SDM2007-260
pp.63-68
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