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Committee Date Time Place Paper Title / Authors Abstract Paper #
DC 2014-12-19
15:10		 Toyama   Studies on Reliability Evaluation Techniques for Triple Register Circuits
Naoki Midorikawa, Muneyuki Nakamura, Aromhack Saysanasongkham, Kazuya Sakai, Satoshi Fukumoto (Tokyo Metropolitan Univ.) DC2014-72		 This paper discusses the reliability evaluation technique for the triple register circuit which our research group had p... [more] DC2014-72
pp.29-32
DC, CPSY
(Joint)		 2013-08-01
18:00		 Fukuoka Kitakyushu-Kokusai-Kaigijyo Evaluation of Transient-Error-Tolerant Dependable Processors based on Multiplexed Registers
Naoki Midorikawa, Yoshifumi Koyama (Tokyo Metropolitan Univ.), Masayuki Arai (Nihon Univ.), Satoshi Fukumoto (Tokyo Metropolitan Univ.) DC2013-20		 Recently, highly reliable design technique for processors which have transient error tolerance are presented for various... [more] DC2013-20
pp.21-25
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