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Committee Date Time Place Paper Title / Authors Abstract Paper #
NLP 2017-11-06
10:00		 Miyagi Research Institute of Electrical Communication Tohoku University Relationship between neural activity rhythm and neuronal avalanche phenomenon
Mayu Aoki (TUS), Hideyuki Kato (TEU), Yutaka Shimada, Kantaro Fujiwara, Tohru Ikeguchi (TUS) NLP2017-75		  [more] NLP2017-75
pp.59-64
SDM 2015-03-02
10:35		 Tokyo Kikai-Shinko-Kaikan Bldg [Invited Talk] Integration Technology of 3D FPGA with Performance Scalability and Function Flexibility
Kenichi Takeda, Mayu Aoki (Hitachi) SDM2014-163		 Three-layer stacked wafer with CMOS devices was demonstrated by using hybrid wafer bonding and via-last through silicon ... [more] SDM2014-163
pp.7-11
SDM 2014-01-29
15:30		 Tokyo Kikai-Shinko-Kaikan Bldg. [Invited Talk] 3D Integrated CMOS Device by Using Wafer Stacking and Via-last TSV
Mayu Aoki, Futoshi Furuta, Kazuyuki Hozawa, Yuko Hanaoka, Kenichi Takeda (Hitachi) SDM2013-145		 A three-layer-stacked wafer with CMOS devices was fabricated for the first time by using hybrid wafer bonding and backsi... [more] SDM2013-145
pp.43-46
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