IEICE Technical Committee Submission System
Conference Schedule
Online Proceedings
[Sign in]
Tech. Rep. Archives
    [Japanese] / [English] 
( Committee/Place/Topics  ) --Press->
 
( Paper Keywords:  /  Column:Title Auth. Affi. Abst. Keyword ) --Press->

All Technical Committee Conferences  (Searched in: All Years)

Search Results: Conference Papers
 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
 Results 1 - 10 of 10  /   
Committee Date Time Place Paper Title / Authors Abstract Paper #
IA, ICSS 2022-06-24
10:25
Nagasaki Univ. of Nagasaki
(Primary: On-site, Secondary: Online)
Application of Adversarial Examples to Physical ECG Signals
Taiga Ono (Waseda Univ.), Takeshi Sugawara (UEC), Jun Sakuma (Tsukuba Univ./RIKEN), Tatsuya Mori (Waseda Univ./RIKEN/NICT) IA2022-11 ICSS2022-11
This work aims to assess the reality and feasibility of applying adversarial examples to attack cardiac diagnosis system... [more] IA2022-11 ICSS2022-11
pp.61-66
VLD, HWS
(Joint)
2018-03-01
15:20
Okinawa Okinawa Seinen Kaikan Hardware/Software co-design environment in model-based parallelization (MBP)
Kazuki Kashiwabara, Shinya Honda, Masato Edahiro (Nagoya Univ.) VLD2017-115
In recent years, while the complexity and high performance of in-vehicle systems are progressing, restrictions on time a... [more] VLD2017-115
pp.157-162
MBE, NC, NLP
(Joint)
2018-01-27
10:55
Fukuoka Kyushu Institute of Technology Visual information encoding by high-frequency spike population in mouse retinal ganglion cells
Hirotsugu Yamaguchi, Yuka Kudo, Koji Ishii, Yuki Hayashida, Tetsuya Yagi (Osaka Univ.) NC2017-60
It is well known that visual information is continuously transformed into spike discharges in ganglion cells in the reti... [more] NC2017-60
pp.59-64
IPSJ-ARC, VLD, CPSY, RECONF, IPSJ-SLDM [detail] 2018-01-18
16:00
Kanagawa Raiosha, Hiyoshi Campus, Keio University Integrated Machine Code Monitor on FPGA
Hiroaki Kaneko, Akinori Kanasugi (TokyoDenki Univ.) VLD2017-73 CPSY2017-117 RECONF2017-61
Machine code monitor is necessary for initial program development stage when implementing a new processor with unique IS... [more] VLD2017-73 CPSY2017-117 RECONF2017-61
pp.65-70
SANE 2015-11-23
10:30
Overseas AIT, Bangkok, Thailand Development of a Software System for Attitude Determination and Control System Simulator
Hoang The Huynh, Nguyen Dinh Quan, Bui Tien Thanh, Nguyen Minh Thao, Le Xuan Huy, Vu Viet Phuong, Pham Anh Tuan (VAST) SANE2015-50
Attitude determination and control system (ADCS) is one of the most important sub-systems of the satellite in charge of ... [more] SANE2015-50
pp.1-5
RECONF 2015-09-18
13:00
Ehime Ehime University A High-level Hardware Design Environment in Python
Shinya Takamaeda (NAIST) RECONF2015-36
In software development, on standard computers, there are numerous alternatives of programming languages. In contrast, t... [more] RECONF2015-36
pp.21-26
IN 2013-06-20
14:25
Fukui University of Fukui, Bunkyo Campus, Memorial Academy Hall Writing Window Join Processor in C
Eric Shun Fukuda (Hokkaido Univ.), Hideyuki Kawashima (Univ. of Tsukuba), Hiroaki Inoue (NEC), Tetsuya Asai, Masato Motomura (Hokkaido Univ.) IN2013-26
In the past, there has always been a wide gap between the skills for designing software and hardware. Now that reconfigu... [more] IN2013-26
pp.7-12
RECONF, VLD, CPSY, IPSJ-SLDM [detail] 2011-01-18
10:55
Kanagawa Keio Univ (Hiyoshi Campus) Feasibility of JHDL for Dynamically Reconfigurable Hardware Design
Naomichi Furushima, Nobuya Watanabe, Akira Nagoya (Okayama Univ.) VLD2010-103 CPSY2010-58 RECONF2010-72
To develop applications for dynamically reconfigurable hardware, the description language which increases the efficienc... [more] VLD2010-103 CPSY2010-58 RECONF2010-72
pp.133-138
R 2010-07-30
15:05
Yamagata   A Note on Service Availability Measurement for Hardware/Software System
Koichi Tokuno, Shigeru Yamada (Tottori Univ.) R2010-21
Service availability is one of the customer-oriented attribute and defined as the attribute that the system can successf... [more] R2010-21
pp.25-30
VLD, CAS, SIP 2008-06-27
09:00
Hokkaido Hokkaido Univ. Customizable Hardware/Software Evaluation Method Using Simple High-level Synthesis
Chongyang Zhang (Waseda Univ.), Toshiro Isomura, Yu Suzuki (Toyota Motor Corp.), Shinji Kimura (Waseda Univ.) CAS2008-19 VLD2008-32 SIP2008-53
In hardware/software codesign, the functional description of an information system is optimized as a mixture of software... [more] CAS2008-19 VLD2008-32 SIP2008-53
pp.1-6
 Results 1 - 10 of 10  /   
Choose a download format for default settings. [NEW !!]
Text format pLaTeX format CSV format BibTeX format
Copyright and reproduction : All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)


[Return to Top Page]

[Return to IEICE Web Page]


The Institute of Electronics, Information and Communication Engineers (IEICE), Japan