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Committee Date Time Place Paper Title / Authors Abstract Paper #
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]		 2013-11-27
14:30		 Kagoshima   New Via Programmable Architecture VPEX4 (1) -- Development of new logic element for improvement of routability and power consumption --
Ryohei Hori, Taku Otani, Tatsuro Hitomi, Shota Ueguchi (Ritsumeikan Univ.), Masaya Yoshikawa (Meijo Univ.), Takeshi Fujino (Ritsumeikan Univ.) VLD2013-71 DC2013-37		 The Non-Recruring Engineering (NRE) cost of LSI is increasing drastically with the advances in LSI process and manufactu... [more] VLD2013-71 DC2013-37
pp.81-86
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]		 2012-11-28
09:50		 Fukuoka Centennial Hall Kyushu University School of Medicine Performance evaluation of Via Programmable Logic VPEX using P&R tool
Taku Otani, Ryohei Hori, Taisuke Ueoka (Ritsumeikan Univ), Masaya Yoshikawa (Meijo Univ), Takeshi Fujino (Ritsumeikan Univ) VLD2012-90 DC2012-56		 We have been studying via programmable structured ASIC architecture “VPEX” which can realize arbitrary logic by customiz... [more] VLD2012-90 DC2012-56
pp.177-182
VLD 2012-03-06
10:35		 Oita B-con Plaza Performance evaluation and Improvement of Via Programmable Logic VPEX
Taku Otani, Ryohei Hori, Tatsuya Kitamori, Taisuke Ueoka (Ritsumeikan Univ.), Masaya Yoshikawa (Meijo Univ.), Takeshi Fujino (Ritsumeikan Univ.) VLD2011-121		 We have been studying via programmable structured ASIC architecture “VPEX” which can realize arbitrary logic by customiz... [more] VLD2011-121
pp.7-12
ICD 2011-12-15
16:10		 Osaka   [Poster Presentation] Via programmable analog circuit (VPA): New approach for analog circuits
Ryo Nakazawa, Ryohei Hori, Keisuke Ueda, Mitsuru Shiozaki, Tomohiro Fujita, Takeshi Fujino (Ritsumeikan Univ) ICD2011-120		 Reconfigurable mixed signal systems have tremendous potential for the rapid implementation of mixed-signal circuits. How... [more] ICD2011-120
pp.99-103
VLD 2011-03-04
15:30		 Okinawa Okinawaken-Danjo-Kyodo-Sankaku Center Performance Evaluation of Via Programmable ASIC Architecture VPEX3
Taisuke Ueoka, Tatsuya Kitamori, Ryohei Hori (Ritsumeikan Univ.), Masaya Yoshikawa (Meijo Univ.), Takeshi Fujino (Ritsumeikan Univ.) VLD2010-146		 We have been studying via programmable ASIC architecture “VPEX” whose logic element (LE) consists of complex-gate type E... [more] VLD2010-146
pp.177-182
 Results 1 - 5 of 5  /   
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