Print edition: ISSN 0913-5685
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ICD2006-1
The Origin of Variable Retention Time in DRAM
-- Fluctuation of Junction Leakage --
Yuki Mori (Hitachi CRL), Kiyonori Ohyu, Kensuke Okonogi (Elpida), Renichi Yamada (Hitachi CRL)
pp. 1 - 6
ICD2006-2
A 65nm Low-Power Embedded DRAM with Extended Data-Retention Sleep Mode
Tomohisa Takai, Takeshi Nagai, Masaharu Wada, Hitoshi Iwai, Mariko Kaku, Atsushi Suzuki, Naoko Itoga, Takayuki Miyazaki (Toshiba), Hiroyuki Takenaka (Toshiba Microelectronics), Takehiko Hojo, Shinji Miyano (Toshiba)
pp. 7 - 12
ICD2006-3
An 8.4ns Column-Access 1.6Gb/s/pin DDR3 SDRAM with an 8:4 Multiplexed Data-Transfer Scheme
Shuichi Kubouchi (Hitachi ULSI), Hiroki Fujisawa, Koji Kuroki, Naohisa Nishioka, Yoshiro Riho, Hiromasa Noda (Elpida Memory), Isamu Fujii, Hideyuki Yoko, Ryuuji Takishita, Takahiro Ito, Hitoshi Tanaka (Hitachi ULSI), Masayuki Nakamura (Elpida Memory)
pp. 13 - 18
ICD2006-4
[Special Invited Talk]
Sub-1V DRAM Design
Takayuki Kawahara (Hitachi Central Research Lab.)
pp. 19 - 24
ICD2006-5
Technology development of 128Mb-FBC(Floating Body Cell) Memory by 90nm node CMOS process
Hiroomi Nakajima, Yoshihiro Minami, Tomoaki Shino (SoC Center, Toshiba), Atsushi Sakamoto (TJ), Tomoki Higashi (TOSMEC), Naoki Kusunoki, Katsuyuki Fujita, Kosuke Hatsuda, Takashi Ohsawa, Nobutoshi Aoki, Hiroyoshi Tanimoto, Mutsuo Morikado, Kazumi Inoh, Takeshi Hamamoto, Akihiro Nitayama (SoC Center, Toshiba)
pp. 25 - 30
ICD2006-6
[Special Invited Talk]
Techniques and Scaling Scenario for Chain FeRAM
Daisaburo Takashima (Toshiba)
pp. 31 - 36
ICD2006-7
[Special Invited Talk]
New Memory Device on SoC Platform
Kazutami Arimoto (Renesas)
pp. 37 - 42
ICD2006-8
[Special Invited Talk]
Requirement for the Memory Architecture from the SoC Design Point of View
Masafumi Takahashi (Toshiba)
pp. 43 - 48
ICD2006-9
[Panel Discussion]
What is your urgent task in R/D of new embedded memories?
Hideto Hidaka (Renesas), Masao Taguchi (SPANSION), Takayuki Kawahara (Hitachi), Daisaburo Takashima (Toshiba), Shuichi Ueno (Renesas), Masashi Takata (Kanazawa Univ.), Masafumi Takahashi (Toshiba)
p. 49
ICD2006-10
Nonvolatile SRAM based on Phase Change
Masashi Takata, Kazuya Nakayama, Takatomi Izumi, Toru Shinmura, Junichi Akita, Akio Kitagawa (Kanazawa Univ.)
pp. 51 - 56
ICD2006-11
Pipelined Self Reference Read Scheme for MRAM
Leona Okamura (Waseda Univ.), Yuji Kihara (Renesas Technology Inc.), Kim Tae Yun, Fuminori Kimura, Yusuke Matsui (Waseda Univ.), Tsukasa Oishi (Renesas Technology Inc.), Tsutomu Yoshihara (Waseda Univ.)
pp. 57 - 62
ICD2006-12
a 4Mb MRAM and its experimental application
Tadahiko Sugibayashi, Takeshi Honda, Noboru Sakimura, Kiyokazu Nagahara, Sadahiko Miura, Ken-ichi Shimura, Kiyotaka Tsuji, Yoshiyuki Fukumoto, Hiroaki Honjo, Tetsuhiro Suzuki, Yuko Kato, Shinsaku Saito, Naoki Kasai, Hideaki Numata, Norikazu Ohshima (NEC)
pp. 63 - 67
ICD2006-13
High Performance 16Mb MRAM for Portable Applications
Yuui Shimizu, Yoshihisa Iwata, Kenji Tsuchida, Tsuneo Inaba, Ryosuke Takizawa, Yoshihiro Ueda, Kiyotaro Itagaki, Yoshiaki Asao, Takeshi Kajiyama, Keiji Hosotani, Sumio Ikegawa, Tadashi Kai, Masahiko Nakayama, Hiroaki Yoda (Toshiba Co.)
pp. 69 - 73
ICD2006-14
[Special Invited Talk]
Spin-Transfer Torque Writing Technology (STT-RAM) For Future MRAM
Hide Nagai, Yiming Huai (Grandis), Shuichi Ueno, Tsuyoshi Koga (Renesas Technology)
pp. 75 - 80
ICD2006-15
DRAM技術を用いた16M SRAM
Yuji Kihara, Yasushi Nakashima, Takashi Izutsu, Masayuki Nakamoto (Renesas), Tsutomu Yoshihara (Waseda Univ.)
pp. 81 - 84
ICD2006-16
Redefinition of Write Margin for Next-Generation SRAMs and Write-Margin Monitoring Circuits
Koichi Takeda, Hidetoshi Ikeda, Yasuhiko Hagihara, Masahiro Nomura (NEC), Hiroyuki Kobatake (NECEL)
pp. 85 - 90
ICD2006-17
[Special Invited Talk]
Low-Power Low-Voltage SRAM Design for Battery Operation
Masanao Yamaoka (Hitachi, Ltd.)
pp. 91 - 96
ICD2006-18
Worst-Case Ananlysis to Obtain Stable Read/Write DC Margin of High Density 6T-SRAM-Array with Local Vth Variability
Yasumasa Tsukamoto, Koji Nii (Renesas Technology), Susumu Imaoka (Renesas Design), Yuji Oda (Shikino High-Tech.), Shigeki Ohbayashi, Makoto Yabuuchi, Hiroshi Makino, Koichiro Ishibashi, Hirofumi Shinohara (Renesas Technology)
pp. 97 - 102
ICD2006-19
Floating Gate Type Planar MOSFET Memory with 35 nm Gate Length using Double Junction Tunneling
Ryuji Ohba, Yuichiro Mitani, Naoharu Sugiyama, Shinobu Fujita (Toshiba)
pp. 103 - 107
ICD2006-20
An Internal Voltage Generation System of Flash Memory Module
Jiro Ishikawa, Toshihiro Tanaka, Akira Kato, Takashi Yamaki, Yukiko Umemoto, Takeshi Shimozato, Isao Nakamura, Yutaka Shinagawa (Renesas Technology Corp.)
pp. 109 - 113
ICD2006-21
A 56nm CMOS 99mm2 8Gb Multi-level NAND Flash Memory with 10MB/s Program Throughput
Makoto Iwai, Ken Takeuchi, Yasushi Kameda, Susumu Fujimura, Hiroyuki Otake, Koji Hosono, Hitoshi Shiga, Yoshihisa Watanabe, Takuya Futatsuyama, Yoshihiko Shindo, Masatsugu Kojima, Masanobu Shirakawa, Masayuki Ichige, Kazuo Hatakeyama, Shinichi Tanaka (Toshiba)
pp. 115 - 120
Note: Each article is a technical report without peer review, and its polished version will be published elsewhere.