IEICE Technical Report

Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380

Dependable Computing

Workshop Date : 2007-11-21 / Issue Date : 2007-11-14

DC2007-37
[Fellow Memorial Lecture] Social Information Infrastructure and Dependable VLSI
Hiroto Yasuura (Kyushu Univ.)
pp. 1 - 6

DC2007-38
A design method for easily testable multipliers adaptable to various structures of partial product addition
Nobutaka Kito, Naofumi Takagi (Nagoya Univ.)
pp. 7 - 12

DC2007-39
Thermal-Aware Test Scheduling with Cycle-Accurate Power Profiles and Test Partitioning
Thomas Edison Yu, Tomokazu Yoneda (NAIST), Krishnendu Chakrabarty (Duke Univ.), Hideo Fujiwara (NAIST)
pp. 13 - 18

DC2007-40
A Construction Method of Path Delay Fault Detectable Circuits
Takashi Watanabe, Takeo Yoshida (Univ. of the Ryukyus)
pp. 19 - 24

DC2007-41
A Resource Binding Method for Reducing Power Consumption of LSI Data Communications
Hidekazu Seto, Kazuhito Ito (Saitama Univ.)
pp. 25 - 30

DC2007-42
Design of low energy array multipliers by reducing signal transitions in partial product accumulators
Hirotaka Kawashima, Kazuhiro Nakamura, Naofumi Takagi, Kazuyoshi Takagi (Nagoya Univ.)
pp. 31 - 36

DC2007-43
A power masking multiplying circuit based on galois field for composite field AES
Nobuyuki Kawahata, Ryuta Nara, Nozomu Togawa, Masao Yanagisawa, Tatsuo Ohtsuki (Waseda Univ.)
pp. 37 - 42

Note: Each article is a technical report without peer review, and its polished version will be published elsewhere.

The Institute of Electronics, Information and Communication Engineers (IEICE), Japan