IEICE Technical Report

Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380

Reconfigurable Systems

Workshop Date : 2007-11-21 / Issue Date : 2007-11-14

RECONF2007-36
[Fellow Memorial Lecture] Social Information Infrastructure and Dependable VLSI
Hiroto Yasuura (Kyushu Univ.)
pp. 1 - 6

RECONF2007-37
The technical comparison of Digital Media Processor and Dynamically Reconfigurable Processor
Kazuo Yamada, Takao Naito (Fuji Xerox)
pp. 7 - 12

RECONF2007-38
An approach to Place and Route challenges in Dynamic Reconfiguration
Ryo Hidaka, Fuminori Kobayashi (Kyushu Inst. of Tech.), Minoru Watanabe (Shizuoka Univ.)
pp. 13 - 17

RECONF2007-39
Redusing Overhead of transferring configuration data on Dynamically Reconfigurable Processor MuCCRA
Takuro Nakamura, Yohei Hasegawa, Satoshi Tsutsumi, Hideharu Amano (Keio Univ.)
pp. 19 - 24

RECONF2007-40
Architecture Exploration Method for Low-Power Dynamically Reconfigurable Processors
Yohei Hasegawa, Satoshi Tsutsumi, Vasutan Tunbungheng, Hideharu Amano (Keio Univ.)
pp. 25 - 30

RECONF2007-41
Power analysis on Dynamic Reconfigurable Processor
Takashi Nishimura, Yohei Hasegawa, Satoshi Tsutsumi, Hideharu Amano (Keio Univ.)
pp. 31 - 36

RECONF2007-42
A low power consumption processor with on-chip control mechanism using pipeline stage unification
Katsuya Kimura, Ryotaro Kobayashi, Toshio Shimada (Nagoya Univ.)
pp. 37 - 42

Note: Each article is a technical report without peer review, and its polished version will be published elsewhere.

The Institute of Electronics, Information and Communication Engineers (IEICE), Japan