Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380
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RECONF2007-43
Designing Soft Error Tolerant LUTs of SRAM-based FPGAs
Kohei Satoyama, Takashi Nakada, Masaki Nakanishi, Shigeru Yamashita, Yasuhiko Nakashima (NAIST)
pp. 1 - 6
RECONF2007-44
Performance evaluation of reconfigurable architecture based on digit-serial computation
Takuro Uchida, Tetsuya Zuyama, Kazuya Tanigawa, Tetsuo Hironaka (Hiroshima City Univ.)
pp. 7 - 12
RECONF2007-45
An Implementation of Operating System Functions for a Reconfigurable System
Akira Kojima, Kazuya Tokunaga, Tetsuo Hironaka (Hiroshima City Univ.)
pp. 13 - 18
RECONF2007-46
A Multi-Rate Compatible Irregular LDPC Decoder Enhancing Column Operation Parallelism
Yuta Imai, Kazunori Shimizu, Nozomu Togawa, Masao Yanagisawa, Tatsuo Ohtsuki (Waseda Univ.)
pp. 19 - 24
RECONF2007-47
Proposal of Optimization Design System for LDPC using FPGA
Yukari Ishida, Hirotaka Nosato (Toho Univ.), Yosuke Iijima (Univ. of Tsukuba), Eiichi Takahashi (AIST), Tatsumi Furuya (Toho Univ.), Tetsuya Higuchi (AIST)
pp. 25 - 29
RECONF2007-48
Design Methods for Radix Converters (4)
-- RNS to Binary Conversion --
Yukihiro Iguchi (Meiji Univ.), Tsutomu Sasao (Kyutech)
pp. 31 - 36
RECONF2007-49
Proposal for High-Speed Secure Network System using FPGA
Hirotaka Nosato, Yukari Ishida (Toho Univ.), Yosuke Iijima (Univ. of Tsukuba), Eiichi Takahashi (AIST), Tatsumi Furuya (Toho Univ.), Tetsuya Higuchi (AIST)
pp. 37 - 42
RECONF2007-50
Evaluation of a Data-Driven Architecture for a Stochastic Biochemical Simulator on an FPGA
Masato Yoshimi, Yuri Nishikawa, Toshinori Kojima, Yasunori Osana, Akira Funahashi (Keio Univ.), Noriko Hiroi (EMBL-EBI), Yuichiro Shibata, Hideki Yamada (Nagasaki Univ.), Hiroaki Kitano (JST), Hideharu Amano (Keio Univ.)
pp. 43 - 48
Note: Each article is a technical report without peer review, and its polished version will be published elsewhere.