IEICE Technical Report

Print edition: ISSN 0913-5685      Online edition: ISSN 2432-6380

Volume 109, Number 53

Neurocomputing

Workshop Date : 2009-05-25 / Issue Date : 2009-05-18

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Table of contents

NC2009-1
An Implementation of Artificial Neural Network on FPGA by VHDL -- Design Pattern Recognition Device --
Tadatoshi Nagao, Ikutarou Mizukami, Tatsuya Honda, Tomohiro Fujita, Minoru Motoki, Kazunori Matsuo, Hidenori Ohyama (Kumamoto National Coll. of Tech.), Hiroyasu Yamamoto, Norihiro Kurokawa (techno design)
pp. 1 - 6

NC2009-2
Advantages and their origins of complex-valued neural networks
Akira Hirose (The Univ. of Tokyo.)
pp. 7 - 12

NC2009-3
Localized Oscillatory Excitation on Nerve Fields for Self-Organizing Neural Models
Ryota Miyata (Ryukyu Univ.), Akira Date (Miyazaki Univ.), Koji Kurata (Ryukyu Univ.)
pp. 13 - 18

NC2009-4
Reinforcement learning through the active low-dimensional sensory information
Mikihiro Kobayashi (Nara Inst. of Sci and Tech.), Eiji Uchibe, Kenji Doya (OIST)
pp. 19 - 24

NC2009-5
A study for accuracy improvement of automated EEG recognition using Fujimori's method
Fumiaki Tsunashima, Naoyuki Aikawa (Tokyo Univ. of Science), Shigeki Ogata (Univ.of the Ryukyus)
pp. 25 - 30

NC2009-6
A Study on Aberration Region Detection for Array CGH Using Nearest Neighbor Multivariate Test
Yuta Ishikawa, Ichiro Takeuchi (Nagoya Inst. of Tech.)
pp. 31 - 36

Note: Each article is a technical report without peer review, and its polished version will be published elsewhere.


The Institute of Electronics, Information and Communication Engineers (IEICE), Japan