IEICE Technical Report

Print edition: ISSN 0913-5685      Online edition: ISSN 2432-6380

Volume 110, Number 140

Integrated Circuits and Devices

Workshop Date : 2010-07-22 - 2010-07-23 / Issue Date : 2010-07-15

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Table of contents

ICD2010-21
On-Chip Waveform Capture and Diagnosis of Power Delivery in SoC Integration
Takushi Hashida, Hiroshi Matsumoto, Makoto Nagata (Kobe Univ.)
pp. 1 - 4

ICD2010-22
Evaluation of algorithms for waveform acquisition in on-chip multi-channel monitoring
Yuuki Araga, Takushi Hashida, Makoto Nagata (Kobe Univ.)
pp. 5 - 9

ICD2010-23
In-situ Evaluation of Vth and AC Gain of 90 nm CMOS Differential Pair Transistors
Yoji Bando, Satoshi Takaya, Takashi Hasegawa (Kobe Univ.), Toru Ohkawa, Masaaki Souda, Toshiharu Takaramoto, Toshio Yamada, Shigetaka Kumashiro, Tohru Mogami (MIRAI-Selete), Makoto Nagata (Kobe Univ.)
pp. 11 - 14

ICD2010-24
Buffer-Ring-Based All-Digital On-Chip Monitor for PMOS and NMOS Process Variability Effect
Tetsuya Iizuka, Toru Nakura, Kunihiro Asada (Univ. of Tokyo)
pp. 15 - 20

ICD2010-25
[Invited Talk] Digital Calibration and Correction Methods for CMOS-ADCs
Shiro Dosho (Panasonic Corp.)
pp. 21 - 30

ICD2010-26
[Invited Talk] A 10b 50MS/s 820uW SAR ADC with on-chip digital calibration
Sanroku Tsukamoto (Fujitsu Labs.)
pp. 31 - 36

ICD2010-27
[Invited Talk] Digitally-Assisted Analog Test Technology -- Analog Circuit Test Technology in Nano-CMOS Era --
Haruo Kobayashi, Takahiro J. Yamaguchi (Gunma Univ.)
pp. 37 - 42

ICD2010-28
[Invited Talk] Technical Trend of Multi-mode Multi-band RF Transceivers
Hisayasu Sato (Renesas Electronics)
pp. 43 - 48

ICD2010-29
[Invited Talk] A 2.1-to-2.8-GHz Low-Phase-Noise All-Digital Frequency Synthesizer with a Time-Windowed Time-to-Digital Converter
Tadashi Maeda, Takashi Tokairin (Renesas Electronics Corporation), Masaki Kitsunezuka (NEC Corp.), Mitsuji Okada (Renesas Electronics Corporation), Muneo Fukaishi (NEC Corp.)
pp. 49 - 54

ICD2010-30
Implementation and Evaluation of a CMOS Subthreshold Analog Amplifier using 0.5V Power Supply
Tomochika Harada (Yamagata Univ.)
pp. 55 - 60

ICD2010-31
OTA Design Using gm/ID Lookup Table Methodology -- Design optimization featuring settling time analysis --
Toru Kashimura, Takayuki Konishi, Shoichi Masui (Tohoku Univ.)
pp. 61 - 66

ICD2010-32
Considerations of a Common-mode Feedback Circuit in the CMOS Inverter-based Differential Amplifier.
Masayuki Uno (Linear Cell Design)
pp. 67 - 72

ICD2010-33
The Design of a Highly Linearized Gm Amplifier by Adopting the Positive Feedback Compensation Scheme and its Application to High-Frequency Filters
Yusuke Shimoyama, Yasuhiro Sugimoto (Chuo Univ.)
pp. 73 - 78

ICD2010-34
On-chip background calibration of time-interleaved ADC
Takashi Oshima, Tomomi Takahashi (Hitachi)
pp. 79 - 84

ICD2010-35
User Customizable Logic Paper with 2V Organic CMOS and Ink-Jet Printed Interconnects
Koichi Ishida, Naoki Masunaga, Ryo Takahashi, Tsuyoshi Sekitani (Univ. of Tokyo), Shigeki Shino (Mitsubishi Paper Mills Ltd.), Ute Zschieschang, Hagen Klauk (Max Planck Institute), Makoto Takamiya, Takao Someya, Takayasu Sakurai (Univ. of Tokyo)
pp. 115 - 119

ICD2010-36
Self-Dithered Digital Delta Sigma Modulators for Fractional-N Frequency Synthesizers
Zule Xu, Jun Gyu Lee, Shoichi Masui (Tohoku Univ.)
pp. 121 - 126

ICD2010-37
A Study of Simulation Methodologies to Simulate the Buck and Boost DC-DC Converters in High-Speed
Masahiro Suzuki (Chuo Univ.), Syoko Sugimoto (AdIn), Yasuhiro Sugimoto (Chuo Univ.)
pp. 127 - 132

ICD2010-38
Level Converter Circuit for Low Voltage Digital LSIs
Yuji Osaki, Tetsuya Hirose, Nobutaka Kuroki, Masahiro Numa (Kobe Univ.)
pp. 133 - 138

Note: Each article is a technical report without peer review, and its polished version will be published elsewhere.


The Institute of Electronics, Information and Communication Engineers (IEICE), Japan