Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380
[TOP] | [2012] | [2013] | [2014] | [2015] | [2016] | [2017] | [2018] | [Japanese] / [English]
SDM2015-57
[Invited Talk]
Highly Reliable TaOx ReRAM with Centralized Filament for 28-nm Embedded Application
Yukio Hayakawa, Atsushi Himeno, Ryutaro Yasuhara, Satoru Fujii, Satoru Ito, Yoshio Kawashima, Yuuichirou Ikeda, Akifumi Kawahara, Ken Kawai, Zhiqiang Wei, Shunsaku Muraoka, Kazuhiko Shimakawa, Takumi Mikawa, Shinichi Yoneda (Panasonic)
pp. 1 - 5
SDM2015-58
Development of a compacted doubly nesting array in Narrow Scribe Line aimed at detecting soft failures of interconnect via
Hiroki Shinkawata, Nobuo Tsuboi (REL), Atsushi Tsuda (RSD), Shingo Sato (Kansai), Yasuo Yamaguchi (REL)
pp. 7 - 10
SDM2015-59
[Invited Talk]
Implementation of TFET Spice Model for Ultra-Low Power Circuit Analysis
Chika Tanaka, Akira Hokazono, Kanna Adachi, Masakazu Goto, Yoshiyuki Kondo, Emiko Sugizaki, Motohiko Fujimatsu, Hiroyuki Hara, Shinji Miyano, Keiichi Kushida, Shigeru Kawanaka (Toshiba)
pp. 11 - 13
SDM2015-60
[Invited Talk]
Device Design Guideline for negative capacitance FET (NCFET)
Masaharu Kobayashi, Toshiro Hiramoto (The Univ. of Tokyo)
pp. 15 - 18
SDM2015-61
[Invited Talk]
Atom-Switch-Based Programmable Logic Array and ROM
Yukihide Tsuji, X Bai, Makoto Miyamura, Toshitsugu Sakamoto, Munehiro Tada, Naoki Banno, Koichiro Okamoto, Noriyuki Iguchi (NEC), Nobuyuki Sugii (Hitachi), Hiromitsu Hada (NEC)
pp. 19 - 24
SDM2015-62
Digital Frequency Transformaion Circuit for Timewise Unequally Sampled Data
Yuu Tanaka, Weikun Liang, Yoshiaki Hagiwara (Sojo-u)
pp. 25 - 30
SDM2015-63
[Invited Talk]
Recent progress and challenges of high-mobility III-V/Ge CMOS technologies for low power LSI applications
Toshifumi Irisawa (AIST), Keiji Ikeda, Yuuichi Kamimuta, Minoru Oda, Tsutomu Tezuka (AIST/Toshiba), Tatsurou Maeda, Hiroyuki Ota, Kazuhiko Endo (AIST)
pp. 31 - 36
SDM2015-64
Area and Performance Study of FinFET with Detailed Parasitic Capacitance Analysis in 16nm Process Node
Takeshi Okagaki, Koji Shibutani, Masao Morimoto, Yasumasa Tsukamoto, Koji Nii, Kazunori Onozawa (REL)
pp. 37 - 40
SDM2015-65
[Invited Talk]
Low-Power Embedded ReRAM Technology for IoT Applications
Makoto Ueki, Akira Tanabe, Hiroshi Sunamura, Mitsuru Narihiro, Kazuya Uejima, Koji Masuzaki, Naoya Furutake, Akira Mitsuiki, Koichi Takeda, Takashi Hase, Yoshihiro Hayashi (Renesas Electronics)
pp. 41 - 46
SDM2015-66
Circuit Design of Reconfigurable Dynamic Logic and Estimation of Number of Elements
Junki Kato, Shigeyoshi Watanabe, Hiroshi Ninomiya, Manabu Kobayashi, Yasuyuki Miura (SIT)
pp. 47 - 52
SDM2015-67
[Invited Talk]
Novel Single p+Poly-Si/Hf/SiON Gate Stack Technology on Silicon-on-Thin-Buried-Oxide (SOTB) for Ultra-Low Leakage Applications
Yoshiki Yamamoto, Hideki Makiyama, Tomohiro Yamashita, Hidekazu Oda, Shiro Kamohara, Yasuo Yamaguchi (Renesas Electronics Corp.), Nobuyuki Sugii (Hitachi), Tomoko Mizutani, Masaharu Kobayashi, Toshiro Hiramoto (UT)
pp. 53 - 57
SDM2015-68
Threshold Voltage and Current Variability of Extremely Narrow Silicon Nanowire MOSFETs with Width down to 2nm
Tomoko Mizutani, Yuma Tanahashi, Ryota Suzuki, Takuya Saraya, Masaharu Kobayashi, Toshiro Hiramoto (Univ. of Tokyo)
pp. 59 - 62
SDM2015-69
[Invited Talk]
45.5% Energy Reduction by applying DVFS and Multi-Level-Shift Architecture for Low-Power SoCs
Satoshi Tanabe, Atsushi Muramatsu, Ken-ichi Kawasaki, Makoto Mouri, Teruo Ishihara (Flab)
pp. 63 - 68
SDM2015-70
[Invited Talk]
A 25Gb/s Hybrid Integrated Silicon Photonic Transceiver in 28nm CMOS and SOI
Toshihiko Mori, Yanfei Chen, Masaya Kibune (Fujitsu Lab.), Asako Toda (Fujitsu Lab. America), Akinori Hayakawa, Tomoyuki Akiyama, Shigeaki Sekiguchi, Hiroji Ebe, Nobuhiro Imaizumi, Tomoyuki Akahoshi (Fujitsu Lab.), Suguru Aiyama, Shinsuke Tanaka, Takasi Simoyama (PETRA), Ken Morito (Fujitsu Lab.), Takuji Yamamoto (Fujitsu Lab. America)
pp. 69 - 72
Note: Each article is a technical report without peer review, and its polished version will be published elsewhere.