IEICE Technical Report

Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380

Reconfigurable Systems

Workshop Date : 2016-05-19 - 2016-05-20 / Issue Date : 2016-05-12

RECONF2016-1
[Invited Talk] FPGA-based Acceleration of Image Retrieval and its Application to a Document Search System
Hidetoshi Matsumura, Masahiko Sugimura, Hironobu Yamasaki, Yasumoto Tomita, Takayuki Baba, Yasuhiro Watanabe (Fujitsu Labs)
p. 1

RECONF2016-2
Succinct-Data-Structure Based on Block-Size-Constrained Compression for a Text-Search Accelerator
Masanori Hariyama, Hasitha Muthumala Waidyasooriya (Tohoku Univ.)
pp. 3 - 8

RECONF2016-3
Design of an FPGA Platform for Stencil Computation Using OpenCL
Hasitha Muthumala Waidyasooriya, Masanori Hariyama (Tohoku Univ.)
pp. 9 - 12

RECONF2016-4
Design of an FPGA-based Accelerator for Moleculer Dynamics Using OpenCL
Hasitha Muthumala Waidyasooriya, Masanori Hariyama (Tohoku Univ.), Kota Kasahara (Osaka Univ.)
pp. 13 - 16

RECONF2016-5
FPGA Implementation of a Super-Resolution System
Taito Manabe, Yuichiro Shibata, Kiyoshi Oguri (Nagasaki Univ.)
pp. 17 - 22

RECONF2016-6
*
Chengzhe Li, Lai Yoong Yee, Yoshiki Yamaguchi (Univ. Tsukuba)
pp. 23 - 27

RECONF2016-7
*
Kota Ando, Kentaro Orimo, Kodai Ueyoshi, Tetsuya Asai, Masato Motomura (Hokkaido Univ.)
pp. 29 - 34

RECONF2016-8
Efficiency Execution of Split Circuit in a Scalable Hardware System by Signal Compression
Yoshio Murata, Hironari Yoshiuchi, Hironori Nakajo (TUAT)
pp. 35 - 40

RECONF2016-9
Sustained Memory Bandwidth and Computing Performance of FPGA-based Parallel Computation for Fluid Simulation
Daichi Tanaka, Sano Kentaro, Satoru Yamamoto (Tohoku Univ.)
pp. 41 - 46

RECONF2016-10
*
Kasha Yamamoto, Tetsuya Asai, Masato Motomura (Hokkaido Univ.)
pp. 47 - 52

RECONF2016-11
Introduction to 2016 FPGA Trax contest
Yasunori Osana (Ryukyus Univ.), Tomonori Izumi (Ritsumeikan Univ.)
pp. 53 - 54

RECONF2016-12
A large-scale SIMD architecture -- preliminary performance estimation by an FPGA --
Takahiro Ito, Yoshiki Yamaguchi, Taisuke Boku (Univ. Tsukuba), Mitsuhisa Sato (RIKEN AICS), Yuetsu Kodama, Jinpil Lee (RIKEN), Junji Yamamoto, Yaoko Nakagawa (Hitachi)
pp. 55 - 60

RECONF2016-13
Checkpointing and Live-Migration on FPGA-based Supercomputing
Shinya Takamaeda, Vu Hoang Gia, Supasit Kajkamhaeng (NAIST)
pp. 61 - 66

RECONF2016-14
Optically reconfigurable gate arrary with an optical input
Hiroki Shinba, Shinya Furukawa (Shizuoka Univ.), Ili Shairah Abdul Halim (MJIIT), Minoru Watanabe (Shizuoka Univ.), Fuminori Kobayashi (MJIIT)
pp. 67 - 70

RECONF2016-15
Fine-grained body bias control to minimize leakage current of CGRA
Hayate Okuhara, Johannes Maximilian Kuehn, Akram Ben Ahmed, Hideharu Amano (Keio Univ.)
pp. 71 - 76

RECONF2016-16
[Invited Talk] Overviews on key technologies to substantialize 'IoT society'
Toshihiro Matsui, Hisashi Sekine, Hideki Hayashi, Hiroaki Ohkubo, Hirotaka Sunaguchi, Naoyuki Matsuo, Yoshitatsu Sato (NEDO TSC)
pp. 77 - 82

RECONF2016-17
[Invited Talk] Altera OpenCL SDK with Spectra-Q, the latest technology trend and the applications Spectra-Q: The latest technology and applications, including OpenCL SDK
Yukitaka Takemura (Altera JP)
p. 83

RECONF2016-18
*
Kentaro Orimo, Kota Ando, Kodai Ueyoshi, Tetsuya Asai, Masato Motomura (Hokkaido Univ.)
pp. 85 - 90

RECONF2016-19
A Dynamic Memory Selection Strategy for Key-Value Store Appliances with DRAMs and SSDs
Hiroaki Komatsu, Hiroki Matsutani (Keio Univ.)
pp. 91 - 96

RECONF2016-20
A Sound Field Visualizer with Java-based High Level Synthesis Tool and CoRAM Architecture Synthesis Framework
Daichi Teruya, Daichi Miyazaki, Hironori Nakajo (TUAT)
pp. 97 - 102

RECONF2016-21
Evaluation of an OpenCL-Based FPGA Accelerator for Phase-Only Correlation
Masanori Hariyama, Shunsuke Tatsumi, Koichi Ito, Takafumi Aoki (Tohoku Univ.)
pp. 103 - 108

RECONF2016-22
Evaluation of an OpenCL-Based FPGA Platform for Particle Filter
Masanori Hariyama, Shunsuke Tatsumi (Tohoku Univ.), Norikazu Ikoma (Nippon Institute of Technology)
pp. 109 - 113

RECONF2016-23
*
Ebisuhama Yoshiki, Tanigawa Kazuya, Hironaka Tetsuo (Hiroshima City Univ.)
pp. 115 - 120

Note: Each article is a technical report without peer review, and its polished version will be published elsewhere.

The Institute of Electronics, Information and Communication Engineers (IEICE), Japan