Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380
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RECONF2017-1
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pp. 1 - 6
RECONF2017-2
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pp. 7 - 11
RECONF2017-3
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pp. 13 - 16
RECONF2017-4
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p. 17
RECONF2017-5
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pp. 19 - 24
RECONF2017-6
CNN implementation on FPGA with Power of 2 Approximation of Weight
Takahiro Utsunomiya, Motoki Amagasaki, Masahiro Iida, Morihiro Kuga, Toshinori Sueyoshi (Kumamoto Univ.)
pp. 25 - 30
RECONF2017-7
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pp. 31 - 36
RECONF2017-8
A proposal of Bit Serial Arithmetic Units for Arbitrary Precision
Tomonori Miura, Motoki Amagasaki, Masahiro Iida, Morihiro Kuga, Toshinori Sueyoshi (Kumamoto Univ.)
pp. 37 - 41
RECONF2017-9
Radiation tolerance of a holographic memory for optically reconfigurable gate arrays
Yoshizumi Ito, Minoru Watanabe (Shizuoka Univ.), Akifumi Ogiwara (Kobe City College of Tech.)
pp. 43 - 46
RECONF2017-10
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pp. 47 - 50
RECONF2017-11
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pp. 51 - 56
RECONF2017-12
Keisuke Takano, Akira Uejima, Ryo Ozaki, Masaki Kohata (Okayama Univ. of Science)
pp. 57 - 62
RECONF2017-13
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pp. 63 - 68
RECONF2017-14
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pp. 69 - 73
RECONF2017-15
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pp. 75 - 80
RECONF2017-16
Power Optimization for Pipelined CGRA with Intger Linear Program
Takuya Kojima, Naoki Ando, Hayate Okuhara, Ng.Doan Anh Vu, Hideharu Amano (Keio Univ.)
pp. 81 - 86
RECONF2017-17
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pp. 87 - 92
RECONF2017-18
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pp. 93 - 98
RECONF2017-19
FPGA and DPDK-Based Communication Acceleration Methods for Parameter Servers
Kazumasa Kishiki, Korechika Tamura, Hiroki Matsutani (Keio Univ.)
pp. 99 - 104
RECONF2017-20
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pp. 105 - 109
RECONF2017-21
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pp. 111 - 116
Note: Each article is a technical report without peer review, and its polished version will be published elsewhere.