IEICE Technical Report

Print edition: ISSN 0913-5685      Online edition: ISSN 2432-6380

Volume 117, Number 45

Dependable Computing

Workshop Date : 2017-05-22 - 2017-05-24 / Issue Date : 2017-05-15

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Table of contents

DC2017-1
(See Japanese page.)
p. 1

DC2017-2
A Compact Low-Latency Systematic Successive Cancellation Polar Decoder for Visible Light Communication Systems
Duc Phuc Nguyen, Dinh Dung Le, Thi Hong Tran, Takashi Nakada, Yasuhiko Nakashima (NAIST)
pp. 3 - 7

DC2017-3
A prototype of Dimmable Visible Light Communication System on FPGA
Dinh Dung Le, Duc Phuc Nguyen, Thi Hong Tran, Yasuhiko Nakashima (NAIST), Son Kiet Nguyen, Huu Thuan Huynh (HCMUS)
pp. 9 - 13

DC2017-4
(See Japanese page.)
pp. 15 - 20

DC2017-5
(See Japanese page.)
pp. 21 - 26

DC2017-6

()
pp. 27 - 32

DC2017-7
A Case for HTM-supported Concurrent B-trees
Kousei Sai, Jun Miyazaki (Tokyo Inst. of Tech.)
pp. 33 - 38

DC2017-8
(See Japanese page.)
pp. 39 - 44

DC2017-9
Optimization of the aggregation process in Particle-In-Cell method using OpenCL
Hiroyuki Noda, Ryotaro Sakai (Keio Univ.), Takaaki Miyajima, Naoyuki Fujita (JAXA), Hideharu Amano (Keio Univ.)
pp. 45 - 50

DC2017-10
Deduplication Estimation System for Large Scale Enterprise Storage
Kazuei Hironaka, Tomohiro Kawaguchi (Hitachi)
pp. 51 - 54

DC2017-11
A Concept for Distributed Neural Network on Edge Computing
Yuria Hiraga, Takamasa Mitani, Hisakazu Fukuoka, Takashi Nakada, Yasuhiko Nakashima (NAIST)
pp. 62 - 67

DC2017-12
Deterministic Path Delay Measurement Using Short Cycle Test Pattern for Aging Detection
Kentaro Kato, Umi Mori (NIT)
pp. 69 - 74

DC2017-13
On Implementation of the Light-Weight MPAR protocol in NS2
Yusuke Sugiura, Kazuya Sakai, Satoshi Fukumoto (Tokyo Metropolitan Univ.)
pp. 75 - 77

DC2017-14
Study on Application System Anomaly Detection Method Based on Correlation Analysis of Communication Packets Sampling
Masahiko Yasui, Masayuki Sakata, Keisuke Hatasaki, Keitaro Uehara, Takaya Ide, Hitoshi Yabusaki (Hitachi)
pp. 79 - 82

DC2017-15
Note on Evaluation Scheme for Redundant CPU Cache Considering Soft Error Resilience and Performance
Naoya Kawashima, Masayuki Arai (Nihon Univ.)
pp. 103 - 106

Note: Each article is a technical report without peer review, and its polished version will be published elsewhere.


The Institute of Electronics, Information and Communication Engineers (IEICE), Japan