IEICE Technical Report

Online edition: ISSN 2432-6380

Volume 124, Number 3

Integrated Circuits and Devices

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Table of contents

ICD2024-1
[Invited Talk] Information retrieval processors with PWM architecture -- Pursuing the ideal of Neumann type computers --
Katsumi Inoue (AOT)
pp. 1 - 6

ICD2024-2
[Invited Lecture] An SPN Strong PUF with SRAM-based Entropy Source Featuring Both 100-Bit Output Space and Modeling Attack Resilience
Kunyang Liu (Kyoto Univ.), Yichen Tang (Lenovo), Shufan Xu, Kiichi Niitsu (Kyoto Univ.), Hirofumi Shinohara (Waseda Univ.)
p. 7

ICD2024-3
A Proposal for Thermal Problems of IC Using Waveguide -- Technology to Combat Thermal Problems Using Electromagnetic Waveguides --
Kazuyuki Ouchi (WDL)
pp. 8 - 11

ICD2024-4
NanoBridge Based Nonvolatile Memory Macro for High-temperature Operation
Ryusuke Nebashi, Koichiro Okamoto, Toshitsugu Sakamoto, Munehiro Tada (NBS)
pp. 12 - 16

ICD2024-5
[Invited Lecture] Demonstration of Accelerated STT-Switching and High Retention in a scaled MTJ towards High-Density STT-MRAM
Shogo Itai, Masaru Toko, Hideyuki Sugiyama, Chikayoshi Kamata, Rina Takashima, Takeo Koike, Masahiko Nakayama (Kioxia Corporation)
p. 17

ICD2024-6
[Invited Lecture] A 22 nm 10.8 Mb Embedded STT MRAM Macro Achieving over 200 MHz Random Read Access and a 10.4 MB/s Write Throughput for High End MCUs
Masayuki Izuna, Tomoya Ogawa, Ken Matsubara, Yasuhiko Taito, Tomoya Saito, Koichi Takeda, Yoshinobu Kaneda, Takahiro Shimoi, Hidenori Mitani, Takashi Ito, Takashi Kono (Renesas Electronics)
pp. 18 - 19

ICD2024-7
[Invited Lecture] A 40 nm 2 kb MTJ-Based Non-Volatile SRAM Macro with Novel Data-Aware Store Architecture for Normally Off Computing
Kenta Suzuki, Keizo Hiraga, Bessho Kazuhiro (Sony), Kimiyoshi Usami (SIT), Taku Umebayashi (Sony)
pp. 20 - 23

ICD2024-8
[Invited Talk] A818-4094TOPS/W Capacitor-Reconfigured CIM Macro for Unified Acceleration of CNNs and Transformers
Kentaro Yoshioka (Keio)
pp. 24 - 26

ICD2024-9
[Invited Talk] High Density Dynamic Flash Memory (DFM)
Koji Sakui (Unisantis)
pp. 27 - 34

ICD2024-10
[Invited Lecture] Low Power and Thermal Throttling-less SSD with In-Package Boost Converter for 1000-WL Layer 3D Flash Memory
Kazuma Hasegawa, Yuta Aiba, Xu Li, Hitomi Tanaka, Takayuki Miyazaki, Tomoya Sanuki (KIC)
p. 35

ICD2024-11
[Invited Talk] Recent Developments and Challenges for NAND Flash Memory Interface
Takashi Toi (KIOXIA)
p. 36

ICD2024-12
[Invited Lecture] A 1Tb Density 3bits/Cell 3D-NAND Flash on a 2YY Tiers Technology with 300MB/s Write Throughput
Koichi Kawai, Hidehiko Kuge (Micron)
pp. 37 - 41

ICD2024-13
[Invited Lecture] 5-Bit/2Cell(X2.5), 7-Bit/2Cell(X3.5), 9-Bit/2Cell(X4.5) NAND Flash Memory: Half Bit technology
Noboru Shibata, Hironori Uchikawa, Taira Shibuya, Kenri Nakai, Kosuke Yanagidaira, Kosuke Yanagidaira (KIOXIA)
p. 42

ICD2024-14
[Invited Lecture] Development of a Bridge Chip for Scalable Performance and Capacity Storage Systems
Shinichi Ikeda, Akira Iwata, Goichi Otomo, Tomoaki Suzuki, Hiroaki Iijima, Mikio Shiraishi, Shinya Kawakami, Masatomo Eimitsu, Yoshiki Matsuoka, Kiyohito Sato, Shigehiro Tsuchiya, Yoshinori Shigeta, Takuma Aoyama (Kioxia)
p. 43

ICD2024-15
[Invited Lecture] A bi-stable 1-transistor SRAM and a boosted transistor having intrinsic open-base BJT
Yuniarto Widjaja, Christopher Norwood, Kuk-Hwan Kim (Zeno Semiconductor, Inc.)
pp. 44 - 46

Note: Each article is a technical report without peer review, and its polished version will be published elsewhere.