IEICE Technical Report

Online edition: ISSN 2432-6380

Volume 126, Number 235

Silicon Device and Materials

Workshop Date : 2026-11-12 - 2026-11-13 / Issue Date : 2026-11-05

[PREV] [NEXT]

[TOP] | [2020] | [2021] | [2022] | [2023] | [2024] | [2025] | [2026] | [Japanese] / [English]

[PROGRAM] [BULK PDF DOWNLOAD]


Table of contents

SDM2026-44
[Invited Talk] Technology Trend of GAA/3D-Stacked FET and Activities of LSTC
Toshiro Hiramoto (UTokyo/LSTC), Hitoshi Wakabayashi (Science Tokyo/LSTC)
pp. 1 - 2

SDM2026-45
[Invited Talk] Simulation of Spin Exchange Interaction in Quantum Dots -- Incorporating Inhomogeneous Dielectric Environments Using a Green’s-Function Method --
Hidehiro Asai, Shota Iizuka, Junichi Hattori, Tsutomu Ikegami, Takashi Nakayama, Takahiro Mori (AIST)
pp. 3 - 6

SDM2026-46
[Invited Talk] An Experiment-Driven Approach to Modeling Wafer-to-Wafer Bonding for 3D Integration
Fumihiro Inoue (YNU)
pp. 7 - 10

SDM2026-47
[Invited Talk] Twisting in High Aspect Ratio Etching with Charging Effects as a Stochastic Mechanism
Taishi Ikeda, Hisashi Kotakemori, Satoshi Nakamura, Kenta Yashima, Takumi Ohmura, Yasuyuki Kayama (DSRJ), YunTae Lee, Yukihide Tsuji, Shinwook Yi, Moon-Hyun Cha, Jaehoon Jeong (SEC)
pp. 11 - 16

SDM2026-48
[Invited Talk] A TCAD-SPICE Simulation Framework for Quantitative Evaluation of MOSFET Properties from SEM Transient Signals
Yuika Kobayashi, Yohei Nakamura (Hitachi), Shinji Yamaguchi (Hitachi High-Tech)
pp. 17 - 22

SDM2026-49
[Invited Talk] Memory Window Variability Modeling of FeFETs
Kenichiro Sonoda, Shibun Tsuda, Tadashi Yamaguchi, Atsushi Amo, Eiji Tsukuda (Renesas Electronics)
pp. 23 - 28

SDM2026-50
[Invited Talk] Simulation Study on Scaling Limits of Z-direction Pitch in 3D Flash Memories: Toward the Sub-40 nm Regime
Tatsuo Ogura, Yuma Hizume, Yuto Ozeki, Takayuki Kakegawa, Hiroshi Takeda, Takashi Kurusu, Tomohiro Oki, Katsuyuki Sekine (KIOXIA)
pp. 29 - 30

SDM2026-51
[Invited Talk] SISPAD2026 Review
Shingo Sato (Kansai Univ.)
pp. 31 - 36

SDM2026-52
[Invited Talk] Revisiting the Physical Foundations of Quantum Transport in Anisotropic Low-Dimensional Semiconductor Nanostructures
Nobuya Mori (UOsaka)
pp. 37 - 40

SDM2026-53
[Invited Talk] Physics-Informed Neural Networks for Semiconductor Device Analysis: From Forward to Inverse Problems
Satofumi Souma (Kobe Univ.), Akiko Ueda (AIST)
pp. 41 - 46

SDM2026-54
A Unified Framework for MOSFET Drain Saturation Current Based on Drift-Saturation Velocity Competition
Naoyuki Shigyo, Oki Miura (Kumamoto Univ.)
pp. 47 - 50

SDM2026-55
[Invited Talk] Modeling of Soft Errors in CFET SRAM Using Machine Learning-Assisted Circuit Simulation
Vanness Filbert Cierra, Yoshinari Kamakura (Osaka Inst. Tech.)
pp. 51 - 56

SDM2026-56
Proposal of ultra low-cost high-density, high-speed memory and logic LSI with novel stacked GAA transistors for generative AI generation
Ryo Ishikawa, Shigeyoshi Watanabe (SIT)
pp. 57 - 62

Note: Each article is a technical report without peer review, and its polished version will be published elsewhere.


The Institute of Electronics, Information and Communication Engineers (IEICE), Japan