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Paper Abstract and Keywords
Presentation 2007-04-13 09:40
[Invited Talk] A 65 nm Embedded SRAM with Wafer Level Burn-In Mode, Leak-Bit Redundancy and E-trim Fuse for Known Good Die
Shigeki Ohbayashi, Makoto Yabuuchi, Kazushi Kono (Renesas Technology), Yuji Oda (Shikino High-Tech), Susumu Imaoka (Renesas Design), Keiichi Usui (Daioh Electric), Toshiaki Yonezu, Takeshi Iwamoto, Koji Nii, Yasumasa Tsukamoto, Masashi Arakawa, Takahiro Uchida, Hiroshi Makino, Koichiro Ishibashi, Hirofumi Shinohara (Renesas Technology) ICD2007-11
Abstract (in Japanese) (See Japanese page) 
(in English) We propose a Wafer Level Burn-In (WLBI) mode, a leak-bit redundancy and a small, highly reliable Cu E-trim fuse repair scheme for an embedded 6T-SRAM to achieve a KGD-SoC. We fabricated a 16M-SRAM with these techniques using 65 nm LSTP technology, and confirmed its efficient operation. The WLBI mode has almost no area penalty and a speed penalty of only 50 psec. The leak-bit redundancy area penalty is less than 2%.
Keyword (in Japanese) (See Japanese page) 
(in English) 6T-SRAM / 65nm CMOS Technology / Known Good Die / Embedded SRAM / / / /  
Reference Info. IEICE Tech. Rep., vol. 107, no. 1, ICD2007-11, pp. 59-64, April 2007.
Paper # ICD2007-11 
Date of Issue 2007-04-05 (ICD) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
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All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
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Conference Information
Committee ICD  
Conference Date 2007-04-12 - 2007-04-13 
Place (in Japanese) (See Japanese page) 
Place (in English)  
Topics (in Japanese) (See Japanese page) 
Topics (in English)  
Paper Information
Registration To ICD 
Conference Code 2007-04-ICD 
Language English 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) A 65 nm Embedded SRAM with Wafer Level Burn-In Mode, Leak-Bit Redundancy and E-trim Fuse for Known Good Die 
Sub Title (in English)  
Keyword(1) 6T-SRAM  
Keyword(2) 65nm CMOS Technology  
Keyword(3) Known Good Die  
Keyword(4) Embedded SRAM  
Keyword(5)  
Keyword(6)  
Keyword(7)  
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1st Author's Name Shigeki Ohbayashi  
1st Author's Affiliation Renesas Technology (Renesas Technology)
2nd Author's Name Makoto Yabuuchi  
2nd Author's Affiliation Renesas Technology (Renesas Technology)
3rd Author's Name Kazushi Kono  
3rd Author's Affiliation Renesas Technology (Renesas Technology)
4th Author's Name Yuji Oda  
4th Author's Affiliation Shikino High-Tech (Shikino High-Tech)
5th Author's Name Susumu Imaoka  
5th Author's Affiliation Renesas Design Corp. (Renesas Design)
6th Author's Name Keiichi Usui  
6th Author's Affiliation Daioh Electric (Daioh Electric)
7th Author's Name Toshiaki Yonezu  
7th Author's Affiliation Renesas Technology (Renesas Technology)
8th Author's Name Takeshi Iwamoto  
8th Author's Affiliation Renesas Technology (Renesas Technology)
9th Author's Name Koji Nii  
9th Author's Affiliation Renesas Technology (Renesas Technology)
10th Author's Name Yasumasa Tsukamoto  
10th Author's Affiliation Renesas Technology (Renesas Technology)
11th Author's Name Masashi Arakawa  
11th Author's Affiliation Renesas Technology (Renesas Technology)
12th Author's Name Takahiro Uchida  
12th Author's Affiliation Renesas Technology (Renesas Technology)
13th Author's Name Hiroshi Makino  
13th Author's Affiliation Renesas Technology (Renesas Technology)
14th Author's Name Koichiro Ishibashi  
14th Author's Affiliation Renesas Technology (Renesas Technology)
15th Author's Name Hirofumi Shinohara  
15th Author's Affiliation Renesas Technology (Renesas Technology)
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Speaker Author-1 
Date Time 2007-04-13 09:40:00 
Presentation Time 50 minutes 
Registration for ICD 
Paper # ICD2007-11 
Volume (vol) vol.107 
Number (no) no.1 
Page pp.59-64 
#Pages
Date of Issue 2007-04-05 (ICD) 


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