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Paper Abstract and Keywords
Presentation 2008-12-11 13:30
[Poster Presentation] Simulation Techniques for Power Supply Noise and Operation Failures in Digital LSI
Takuya Sawada, Makoto Nagata (Kobe Univ.) ICD2008-110
Abstract (in Japanese) (See Japanese page) 
(in English) Dynamic power-supply noise is analyzed in large-scale CMOS digital LSI.
For the analysis, power-supply current modeling technique by a time series division parasitism capacity sequence(TSDPC) model as power-supply analysis technology is used.
Comparison evaluation of the measurement result of power-supply noise and a simulation result is performed in a 32-bit microprocessor of 90-nm CMOS technology with on-chip noise monitors.
On the other hand, instruction-level programming for logical failure analysis is proposed.
Experimental measurements demonstrate that the amount of voltage drop influences failure susceptibility of digital circuit operation.
Keyword (in Japanese) (See Japanese page) 
(in English) power-supply noise analysis / power-supply current model / failure analysis / an amount of power-supply drop / / / /  
Reference Info. IEICE Tech. Rep., vol. 108, no. 347, ICD2008-110, pp. 47-50, Dec. 2008.
Paper # ICD2008-110 
Date of Issue 2008-12-04 (ICD) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
and
reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF ICD2008-110

Conference Information
Committee ICD  
Conference Date 2008-12-11 - 2008-12-12 
Place (in Japanese) (See Japanese page) 
Place (in English) Tokyo Inst. Tech., Ohokayama Campus, Kokusa-Kouryu-Kaikan 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Workshop for Graduate Student and Young Researchers 
Paper Information
Registration To ICD 
Conference Code 2008-12-ICD 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Simulation Techniques for Power Supply Noise and Operation Failures in Digital LSI 
Sub Title (in English)  
Keyword(1) power-supply noise analysis  
Keyword(2) power-supply current model  
Keyword(3) failure analysis  
Keyword(4) an amount of power-supply drop  
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Keyword(8)  
1st Author's Name Takuya Sawada  
1st Author's Affiliation Kobe University (Kobe Univ.)
2nd Author's Name Makoto Nagata  
2nd Author's Affiliation Kobe University (Kobe Univ.)
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Speaker Author-1 
Date Time 2008-12-11 13:30:00 
Presentation Time 165 minutes 
Registration for ICD 
Paper # ICD2008-110 
Volume (vol) vol.108 
Number (no) no.347 
Page pp.47-50 
#Pages 4 
Date of Issue 2008-12-04 (ICD) 

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