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Paper Abstract and Keywords
Presentation 2010-07-22 09:30
Design of semi-synchronous error correction circuit for superconducting flash type ADC
Kazumasa Ishihara (Tokyo Denki Univ./ISTEC), Hideo Suzuki (ISTEC), Kazunori Miyahara (Tokyo Denki Univ.), Mutsuo Hidaka (ISTEC) SCE2010-14
Abstract (in Japanese) (See Japanese page) 
(in English) We have been developing superconducting flash type ADC(Analog-to-Digital Converter) aiming for the application to a digitizer and a real-time oscilloscope for the next generation optical communication technology and so on. High speed operation and the quantum effect of the superconductor circuit are suitable for ADC, enabling ADC to operate at high speed with small circuit level than that of semiconductor circuit. The ADC circuit consists of a comparator circuit and a digital error correction circuit composed of selectors, D-FF etc. The function of each circuit at low speed has been confirmed, but we need several improvements for high-speed operation. The error correction circuit designed previously a weak structure to the change of the bias current because the delay time between an input signal and a control signal to the selector was adjusted in JTLs.
The present study deals with this problem and improves the error correction circuit. We designed semi-synchronous error correction circuit in which input signals are synchronized with the CLK signal. We designed the error correction circuits of the NOT-CLK type and the CLK type as the selector. The error correction circuits with NOT-CLK type one and the CLK type one have been confirmed at high-speed operations of 20G～40GHz and 20G～30GHz by using on-chip test method, respectively.
Keyword (in Japanese) (See Japanese page) 
(in English) SFQ circuit / Superconducting flash type ADC / / / / / /  
Reference Info. IEICE Tech. Rep., vol. 110, no. 139, SCE2010-14, pp. 1-6, July 2010.
Paper # SCE2010-14 
Date of Issue 2010-07-15 (SCE) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
and
reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF SCE2010-14

Conference Information
Committee SCE  
Conference Date 2010-07-22 - 2010-07-22 
Place (in Japanese) (See Japanese page) 
Place (in English) Kikai-Shinko-Kaikan Bldg. 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Signal processing technologies and their applications, etc. 
Paper Information
Registration To SCE 
Conference Code 2010-07-SCE 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Design of semi-synchronous error correction circuit for superconducting flash type ADC 
Sub Title (in English)  
Keyword(1) SFQ circuit  
Keyword(2) Superconducting flash type ADC  
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1st Author's Name Kazumasa Ishihara  
1st Author's Affiliation Tokyo Denki University/International Superconductivity Technology Center (Tokyo Denki Univ./ISTEC)
2nd Author's Name Hideo Suzuki  
2nd Author's Affiliation International Superconductivity Technology Center (ISTEC)
3rd Author's Name Kazunori Miyahara  
3rd Author's Affiliation Tokyo Denki University (Tokyo Denki Univ.)
4th Author's Name Mutsuo Hidaka  
4th Author's Affiliation International Superconductivity Technology Center (ISTEC)
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Speaker Author-1 
Date Time 2010-07-22 09:30:00 
Presentation Time 25 minutes 
Registration for SCE 
Paper # SCE2010-14 
Volume (vol) vol.110 
Number (no) no.139 
Page pp.1-6 
#Pages 6 
Date of Issue 2010-07-15 (SCE) 

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