Information: Join today and make your research activities more affordable! Technical workshop participation fees and annual registration fees are available at member rates.
Notice: [Important] Announcement of Changes to Registration Fee Payment and Manuscript Upload Procedures for IEICE Technical Meetings
IEICE Technical Committee Submission System
Conference Paper's Information		 Online Proceedings
[Sign in]
Tech. Rep. Archives
 Go Top Page Go Previous   [Japanese] / [English] 

Paper Abstract and Keywords
Presentation 2011-10-21 15:50
Performance Evaluation of 3D FPGA using Through Silicon Via
Naoto Miyamoto (Tohoku Univ.), Yohei Matsumoto (Tokyo Univ. of Marine Science and Technology), Hanpei Koike (AIST), Tadayuki Matsumura, Kenichi Osada, Yahoko Nakagawa (ASET), Tadahiro Ohmi (Tohoku Univ.) SDM2011-113
Abstract (in Japanese) (See Japanese page) 
(in English) 3D LSI fabrication is a promising technology as a representative of “More Than Moore” stream. 3D FPGA is one of the killer applications of the 3D LSI platform because FPGA requires a lot of wire segments. We have developed a true-3D CAD tool for 3D FPGAs. By using this tool we have conducted a place-and-route experiment of 3D FPGAs with homogeneous tileable structure. The evaluation results show that 3D FPGA is superior to 2D FPGAs in terms of wire delay.
Keyword (in Japanese) (See Japanese page) 
(in English) 3D LSI / TSV / FPGA / Reconfigurable / 3D CAD Tool / / /  
Reference Info. IEICE Tech. Rep., vol. 111, no. 249, SDM2011-113, pp. 91-96, Oct. 2011.
Paper # SDM2011-113 
Date of Issue 2011-10-13 (SDM) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
and
reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF SDM2011-113

Conference Information
Committee SDM  
Conference Date 2011-10-20 - 2011-10-21 
Place (in Japanese) (See Japanese page) 
Place (in English) Tohoku Univ. (Niche) 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Process science and new process technologies 
Paper Information
Registration To SDM 
Conference Code 2011-10-SDM 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Performance Evaluation of 3D FPGA using Through Silicon Via 
Sub Title (in English)  
Keyword(1) 3D LSI  
Keyword(2) TSV  
Keyword(3) FPGA  
Keyword(4) Reconfigurable  
Keyword(5) 3D CAD Tool  
Keyword(6)  
Keyword(7)  
Keyword(8)  
1st Author's Name Naoto Miyamoto  
1st Author's Affiliation Tohoku University (Tohoku Univ.)
2nd Author's Name Yohei Matsumoto  
2nd Author's Affiliation Tokyo University of Marine Schience and Technology (Tokyo Univ. of Marine Science and Technology)
3rd Author's Name Hanpei Koike  
3rd Author's Affiliation National Institute of Advanced Industrial Science and Technology (AIST)
4th Author's Name Tadayuki Matsumura  
4th Author's Affiliation Association of Super-Advanced Electronics Technologies (ASET)
5th Author's Name Kenichi Osada  
5th Author's Affiliation Association of Super-Advanced Electronics Technologies (ASET)
6th Author's Name Yahoko Nakagawa  
6th Author's Affiliation Association of Super-Advanced Electronics Technologies (ASET)
7th Author's Name Tadahiro Ohmi  
7th Author's Affiliation Tohoku University (Tohoku Univ.)
8th Author's Name  
8th Author's Affiliation ()
9th Author's Name  
9th Author's Affiliation ()
10th Author's Name  
10th Author's Affiliation ()
11th Author's Name  
11th Author's Affiliation ()
12th Author's Name  
12th Author's Affiliation ()
13th Author's Name  
13th Author's Affiliation ()
14th Author's Name  
14th Author's Affiliation ()
15th Author's Name  
15th Author's Affiliation ()
16th Author's Name  
16th Author's Affiliation ()
17th Author's Name  
17th Author's Affiliation ()
18th Author's Name  
18th Author's Affiliation ()
19th Author's Name  
19th Author's Affiliation ()
20th Author's Name  
20th Author's Affiliation ()
21st Author's Name  
21st Author's Affiliation ()
22nd Author's Name  
22nd Author's Affiliation ()
23rd Author's Name  
23rd Author's Affiliation ()
24th Author's Name  
24th Author's Affiliation ()
25th Author's Name  
25th Author's Affiliation ()
26th Author's Name / /
26th Author's Affiliation ()
()
27th Author's Name / /
27th Author's Affiliation ()
()
28th Author's Name / /
28th Author's Affiliation ()
()
29th Author's Name / /
29th Author's Affiliation ()
()
30th Author's Name / /
30th Author's Affiliation ()
()
31st Author's Name / /
31st Author's Affiliation ()
()
32nd Author's Name / /
32nd Author's Affiliation ()
()
33rd Author's Name / /
33rd Author's Affiliation ()
()
34th Author's Name / /
34th Author's Affiliation ()
()
35th Author's Name / /
35th Author's Affiliation ()
()
36th Author's Name / /
36th Author's Affiliation ()
()
Speaker Author-1 
Date Time 2011-10-21 15:50:00 
Presentation Time 25 minutes 
Registration for SDM 
Paper # SDM2011-113 
Volume (vol) vol.111 
Number (no) no.249 
Page pp.91-96 
#Pages 6 
Date of Issue 2011-10-13 (SDM) 

[Return to Top Page]

[Return to IEICE Web Page]
The Institute of Electronics, Information and Communication Engineers (IEICE), Japan