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| Presentation | 2016-10-26 16:10 [Invited Talk] Ultralow-Voltage Operation of Silicon-on-Thin-BOX (SOTB) 2Mbit SRAM Down to 0.37 V Utilizing Adaptive Back Bias Yoshiki Yamamoto, Hideki Makiyama, Takumi Hasegawa, Shinobu Okanishi, Keiichi Maekawa, Shinkawata Hiroki, Shiro Kamohara, Yasuo Yamaguchi (Renesas), Nobuyuki Sugii (Hitachi), Tomoko Mizutani, Toshiro Hiramoro (UT)  SDM2016-72 Link to ES Tech. Rep. Archives: SDM2016-72 |
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| Abstract | (in Japanese) | (See Japanese page) |
| (in English) | We demonstrated record 0.37V minimum operation voltage (VMIN) of 2Mb Silicon-on-Thin-Buried-oxide (SOTB) 6T-SRAM. Thanks to the small variability of SOTB (AVT~1.3 mVμm) and adaptive back biasing (ABB), VMIN was lowered down to ~0.4 V regardless of temperature. Both fast access time and small standby leakage were achieved by ABB. | |
| Keyword | (in Japanese) | (See Japanese page) |
| (in English) | Silicon-on-Thin-Buried-oxide / SRAM / Low Voltage Operation / Low Standby Leakage / back bias / / / | |
| Reference Info. | IEICE Tech. Rep., vol. 116, no. 270, SDM2016-72, pp. 21-25, Oct. 2016. | |
| Paper # | SDM2016-72 | |
| Date of Issue | 2016-10-19 (SDM) | |
| ISSN | Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 | |
| Copyright and reproduction |
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| Download PDF | SDM2016-72 Link to ES Tech. Rep. Archives: SDM2016-72 |
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| Conference Information | |
| Committee | SDM |
| Conference Date | 2016-10-26 - 2016-10-27 |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Niche, Tohoku Univ. |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | Process Science and New Process Technology |
| Paper Information | |
| Registration To | SDM |
| Conference Code | 2016-10-SDM |
| Language | Japanese |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Ultralow-Voltage Operation of Silicon-on-Thin-BOX (SOTB) 2Mbit SRAM Down to 0.37 V Utilizing Adaptive Back Bias |
| Sub Title (in English) | |
| Keyword(1) | Silicon-on-Thin-Buried-oxide |
| Keyword(2) | SRAM |
| Keyword(3) | Low Voltage Operation |
| Keyword(4) | Low Standby Leakage |
| Keyword(5) | back bias |
| Keyword(6) | |
| Keyword(7) | |
| Keyword(8) | |
| 1st Author's Name | Yoshiki Yamamoto |
| 1st Author's Affiliation | Renesas Electronics Corporation (Renesas) |
| 2nd Author's Name | Hideki Makiyama |
| 2nd Author's Affiliation | Renesas Electronics Corporation (Renesas) |
| 3rd Author's Name | Takumi Hasegawa |
| 3rd Author's Affiliation | Renesas Electronics Corporation (Renesas) |
| 4th Author's Name | Shinobu Okanishi |
| 4th Author's Affiliation | Renesas Electronics Corporation (Renesas) |
| 5th Author's Name | Keiichi Maekawa |
| 5th Author's Affiliation | Renesas Electronics Corporation (Renesas) |
| 6th Author's Name | Shinkawata Hiroki |
| 6th Author's Affiliation | Renesas Electronics Corporation (Renesas) |
| 7th Author's Name | Shiro Kamohara |
| 7th Author's Affiliation | Renesas Electronics Corporation (Renesas) |
| 8th Author's Name | Yasuo Yamaguchi |
| 8th Author's Affiliation | Renesas Electronics Corporation (Renesas) |
| 9th Author's Name | Nobuyuki Sugii |
| 9th Author's Affiliation | Hitachi, Ltd (Hitachi) |
| 10th Author's Name | Tomoko Mizutani |
| 10th Author's Affiliation | The University of Tokyo (UT) |
| 11th Author's Name | Toshiro Hiramoro |
| 11th Author's Affiliation | The University of Tokyo (UT) |
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| 12th Author's Affiliation | () |
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| 13th Author's Affiliation | () |
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| 14th Author's Affiliation | () |
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| 15th Author's Affiliation | () |
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| 16th Author's Affiliation | () |
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| 17th Author's Affiliation | () |
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| 18th Author's Affiliation | () |
| Speaker | Author-1 |
| Date Time | 2016-10-26 16:10:00 |
| Presentation Time | 40 minutes |
| Registration for | SDM |
| Paper # | SDM2016-72 |
| Volume (vol) | vol.116 |
| Number (no) | no.270 |
| Page | pp.21-25 |
| #Pages | 5 |
| Date of Issue | 2016-10-19 (SDM) |
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