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| Presentation | 2022-01-25 10:20 FPGA Implementation of Radar Imaging for Walk-Through Security Screening System Tatsuya Sumiya, Yuki Kobayashi, Masayuki Ariyoshi (NEC)  VLD2021-64 CPSY2021-33 RECONF2021-72 |
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| Abstract | (in Japanese) | (See Japanese page) |
| (in English) | To enhance security at facilities such as railway stations and commercial buildings where many people come and go without losing user convenience, we have developed a walk-through security screening system which does not require people to stop walking. This system generates images of the screening target based on microwave radar, and detects concealed dangerous objects from those images. Imaging function needs a large amount of processing, and in addition a high frame rate (at least 10 fps) is also required to screen the moving target. Although our current prototype works on a large GPU server, it is desirable to minimize the entire system for practical applications. Therefore, we focus on FPGA that has advantage in minimization, and implement imaging processing on it. With appropriate parallel processing design and implementation, it is confirmed that imaging runs within 70 ms (<100 ms), which is fast enough to achieve 10 fps rate. | |
| Keyword | (in Japanese) | (See Japanese page) |
| (in English) | Imaging / Radar / FPGA / Security Screening / / / / | |
| Reference Info. | IEICE Tech. Rep., vol. 121, no. 344, RECONF2021-72, pp. 84-89, Jan. 2022. | |
| Paper # | RECONF2021-72 | |
| Date of Issue | 2022-01-17 (VLD, CPSY, RECONF) | |
| ISSN | Online edition: ISSN 2432-6380 | |
| Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) | |
| Download PDF | VLD2021-64 CPSY2021-33 RECONF2021-72 |
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| Conference Information | |
| Committee | RECONF VLD CPSY IPSJ-ARC IPSJ-SLDM |
| Conference Date | 2022-01-24 - 2022-01-25 |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Online |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | FPGA Applications, etc. |
| Paper Information | |
| Registration To | RECONF |
| Conference Code | 2022-01-RECONF-VLD-CPSY-ARC-SLDM |
| Language | Japanese |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | FPGA Implementation of Radar Imaging for Walk-Through Security Screening System |
| Sub Title (in English) | |
| Keyword(1) | Imaging |
| Keyword(2) | Radar |
| Keyword(3) | FPGA |
| Keyword(4) | Security Screening |
| Keyword(5) | |
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| Keyword(8) | |
| 1st Author's Name | Tatsuya Sumiya |
| 1st Author's Affiliation | NEC Corporation (NEC) |
| 2nd Author's Name | Yuki Kobayashi |
| 2nd Author's Affiliation | NEC Corporation (NEC) |
| 3rd Author's Name | Masayuki Ariyoshi |
| 3rd Author's Affiliation | NEC Corporation (NEC) |
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| Speaker | Author-1 |
| Date Time | 2022-01-25 10:20:00 |
| Presentation Time | 25 minutes |
| Registration for | RECONF |
| Paper # | VLD2021-64, CPSY2021-33, RECONF2021-72 |
| Volume (vol) | vol.121 |
| Number (no) | no.342(VLD), no.343(CPSY), no.344(RECONF) |
| Page | pp.84-89 |
| #Pages | 6 |
| Date of Issue | 2022-01-17 (VLD, CPSY, RECONF) |
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