IEICE Technical Committee Submission System
Conference Paper's Information
Online Proceedings
[Sign in]
Tech. Rep. Archives
 Go Top Page Go Previous   [Japanese] / [English] 

Paper Abstract and Keywords
Presentation 2022-03-07 13:15
[Memorial Lecture] An Accuracy Reconfigurable Vector Accelerator based on Approximate Logarithmic Multipliers
Lingxiao Hou, Yutaka Masuda, Tohru Ishihara (Nagoya Univ.) VLD2021-83 HWS2021-60
Abstract (in Japanese) (See Japanese page) 
(in English) The logarithmic approximate multiplier proposed by Mitchell provides an efficient alternative to accurate multipliers in terms of area and power consumption. However, its maximum error of 11.1% makes it difficult to deploy in applications requiring high accuracy. To widely reduce the error of the Mitchell multiplier, this paper proposes a novel operand decomposition method which decomposes one operand into multiple operands and calculates them using multiple Mitchell multipliers. Based on this operand decomposition, this paper also proposes an accuracy reconfigurable vector accelerator which can provide a required computational accuracy with a high parallelism. The proposed vector accelerator dramatically reduces the area by more than half from the accurate multiplier array while satisfying the required accuracy for various applications. The experimental results show that our proposed vector accelerator behaves well in image processing and robot localization.
Keyword (in Japanese) (See Japanese page) 
(in English) Approximate Computing / Energy Efficient Computing / Low Power Design / Vector Acceleration / Single Instruction Multiple Data / / /  
Reference Info. IEICE Tech. Rep., vol. 121, no. 412, VLD2021-83, pp. 43-43, March 2022.
Paper # VLD2021-83 
Date of Issue 2022-02-28 (VLD, HWS) 
ISSN Online edition: ISSN 2432-6380
Copyright
and
reproduction
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF VLD2021-83 HWS2021-60

Conference Information
Committee VLD HWS  
Conference Date 2022-03-07 - 2022-03-08 
Place (in Japanese) (See Japanese page) 
Place (in English) Online 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Design Technology for System-on-Silicon, Hardware Security, etc. 
Paper Information
Registration To VLD 
Conference Code 2022-03-VLD-HWS 
Language English 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) An Accuracy Reconfigurable Vector Accelerator based on Approximate Logarithmic Multipliers 
Sub Title (in English)  
Keyword(1) Approximate Computing  
Keyword(2) Energy Efficient Computing  
Keyword(3) Low Power Design  
Keyword(4) Vector Acceleration  
Keyword(5) Single Instruction Multiple Data  
Keyword(6)  
Keyword(7)  
Keyword(8)  
1st Author's Name Lingxiao Hou  
1st Author's Affiliation Nagoya University (Nagoya Univ.)
2nd Author's Name Yutaka Masuda  
2nd Author's Affiliation Nagoya University (Nagoya Univ.)
3rd Author's Name Tohru Ishihara  
3rd Author's Affiliation Nagoya University (Nagoya Univ.)
4th Author's Name  
4th Author's Affiliation ()
5th Author's Name  
5th Author's Affiliation ()
6th Author's Name  
6th Author's Affiliation ()
7th Author's Name  
7th Author's Affiliation ()
8th Author's Name  
8th Author's Affiliation ()
9th Author's Name  
9th Author's Affiliation ()
10th Author's Name  
10th Author's Affiliation ()
11th Author's Name  
11th Author's Affiliation ()
12th Author's Name  
12th Author's Affiliation ()
13th Author's Name  
13th Author's Affiliation ()
14th Author's Name  
14th Author's Affiliation ()
15th Author's Name  
15th Author's Affiliation ()
16th Author's Name  
16th Author's Affiliation ()
17th Author's Name  
17th Author's Affiliation ()
18th Author's Name  
18th Author's Affiliation ()
19th Author's Name  
19th Author's Affiliation ()
20th Author's Name  
20th Author's Affiliation ()
Speaker Author-1 
Date Time 2022-03-07 13:15:00 
Presentation Time 25 minutes 
Registration for VLD 
Paper # VLD2021-83, HWS2021-60 
Volume (vol) vol.121 
Number (no) no.412(VLD), no.413(HWS) 
Page p.43 
#Pages
Date of Issue 2022-02-28 (VLD, HWS) 


[Return to Top Page]

[Return to IEICE Web Page]


The Institute of Electronics, Information and Communication Engineers (IEICE), Japan