Paper Abstract and Keywords |
Presentation |
2022-03-07 13:15
[Memorial Lecture]
An Accuracy Reconfigurable Vector Accelerator based on Approximate Logarithmic Multipliers Lingxiao Hou, Yutaka Masuda, Tohru Ishihara (Nagoya Univ.) VLD2021-83 HWS2021-60 |
Abstract |
(in Japanese) |
(See Japanese page) |
(in English) |
The logarithmic approximate multiplier proposed by Mitchell provides an efficient alternative to accurate multipliers in terms of area and power consumption. However, its maximum error of 11.1% makes it difficult to deploy in applications requiring high accuracy. To widely reduce the error of the Mitchell multiplier, this paper proposes a novel operand decomposition method which decomposes one operand into multiple operands and calculates them using multiple Mitchell multipliers. Based on this operand decomposition, this paper also proposes an accuracy reconfigurable vector accelerator which can provide a required computational accuracy with a high parallelism. The proposed vector accelerator dramatically reduces the area by more than half from the accurate multiplier array while satisfying the required accuracy for various applications. The experimental results show that our proposed vector accelerator behaves well in image processing and robot localization. |
Keyword |
(in Japanese) |
(See Japanese page) |
(in English) |
Approximate Computing / Energy Efficient Computing / Low Power Design / Vector Acceleration / Single Instruction Multiple Data / / / |
Reference Info. |
IEICE Tech. Rep., vol. 121, no. 412, VLD2021-83, pp. 43-43, March 2022. |
Paper # |
VLD2021-83 |
Date of Issue |
2022-02-28 (VLD, HWS) |
ISSN |
Online edition: ISSN 2432-6380 |
Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
Download PDF |
VLD2021-83 HWS2021-60 |
Conference Information |
Committee |
VLD HWS |
Conference Date |
2022-03-07 - 2022-03-08 |
Place (in Japanese) |
(See Japanese page) |
Place (in English) |
Online |
Topics (in Japanese) |
(See Japanese page) |
Topics (in English) |
Design Technology for System-on-Silicon, Hardware Security, etc. |
Paper Information |
Registration To |
VLD |
Conference Code |
2022-03-VLD-HWS |
Language |
English |
Title (in Japanese) |
(See Japanese page) |
Sub Title (in Japanese) |
(See Japanese page) |
Title (in English) |
An Accuracy Reconfigurable Vector Accelerator based on Approximate Logarithmic Multipliers |
Sub Title (in English) |
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Keyword(1) |
Approximate Computing |
Keyword(2) |
Energy Efficient Computing |
Keyword(3) |
Low Power Design |
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Vector Acceleration |
Keyword(5) |
Single Instruction Multiple Data |
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1st Author's Name |
Lingxiao Hou |
1st Author's Affiliation |
Nagoya University (Nagoya Univ.) |
2nd Author's Name |
Yutaka Masuda |
2nd Author's Affiliation |
Nagoya University (Nagoya Univ.) |
3rd Author's Name |
Tohru Ishihara |
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Nagoya University (Nagoya Univ.) |
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Speaker |
Author-1 |
Date Time |
2022-03-07 13:15:00 |
Presentation Time |
25 minutes |
Registration for |
VLD |
Paper # |
VLD2021-83, HWS2021-60 |
Volume (vol) |
vol.121 |
Number (no) |
no.412(VLD), no.413(HWS) |
Page |
p.43 |
#Pages |
1 |
Date of Issue |
2022-02-28 (VLD, HWS) |
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