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Paper Abstract and Keywords
Presentation 2023-02-28 16:15
A Novel High Performance Scan-Test-Aware Hardened Latch with Improved Soft Error Tolerability
Ruijun Ma (AUST), Stefan Holst, Xiaoqing Wen (KIT), Hui Xu (AUST), Aibin Yan (AU) DC2022-91
Abstract (in Japanese) (See Japanese page) 
(in English) The continuous pursuing of smaller technology nodes makes modern Integrated Circuits (ICs) more and more susceptible to soft-errors. Many radiation-hardened latch designs have been proposed to tolerate soft-errors for reliable LSI designs. However, these existing hardened latches can suffer from reliability issues after production because production defects in such hardened latches are difficult to detect with conventional scan testing. In our previous works, we improved the defect detectability of these hardened latches by adding design-for-test (DFT) technique. A hardened latch design, called high performance scan-test-aware hardened latch (HP-STAHL), was proposed for higher defect detectability, higher soft-error tolerability, and lower propagation delay. However, the added DFT structure in HP-STAHL can partially reduce its soft-error tolerability. In this paper, we propose a novel high performance scan-test-aware hardened latch design with improved soft-error tolerability (HP-STAHL-I) by applying a novel design to offset the reduced soft-error tolerability. Simulation results show that HP-STAHL-I provides higher soft-error tolerability than HP-STAHL. HP-STAHL-I also has lower delay and power delay product (PDP) than the standard latch, demonstrating its high performance.
Keyword (in Japanese) (See Japanese page) 
(in English) soft-error / hardened latch / defect / scan test / / / /  
Reference Info. IEICE Tech. Rep., vol. 122, no. 393, DC2022-91, pp. 51-55, Feb. 2023.
Paper # DC2022-91 
Date of Issue 2023-02-21 (DC) 
ISSN Online edition: ISSN 2432-6380
Copyright
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reproduction
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
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Conference Information
Committee DC  
Conference Date 2023-02-28 - 2023-02-28 
Place (in Japanese) (See Japanese page) 
Place (in English) Kikai-Shinko-Kaikan Bldg 
Topics (in Japanese) (See Japanese page) 
Topics (in English)  
Paper Information
Registration To DC 
Conference Code 2023-02-DC 
Language English 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) A Novel High Performance Scan-Test-Aware Hardened Latch with Improved Soft Error Tolerability 
Sub Title (in English)  
Keyword(1) soft-error  
Keyword(2) hardened latch  
Keyword(3) defect  
Keyword(4) scan test  
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1st Author's Name Ruijun Ma  
1st Author's Affiliation Anhui University of Science and Technology (AUST)
2nd Author's Name Stefan Holst  
2nd Author's Affiliation Kyushu Institute of Technology (KIT)
3rd Author's Name Xiaoqing Wen  
3rd Author's Affiliation Kyushu Institute of Technology (KIT)
4th Author's Name Hui Xu  
4th Author's Affiliation Anhui University of Science and Technology (AUST)
5th Author's Name Aibin Yan  
5th Author's Affiliation Anhui University (AU)
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Speaker Author-1 
Date Time 2023-02-28 16:15:00 
Presentation Time 25 minutes 
Registration for DC 
Paper # DC2022-91 
Volume (vol) vol.122 
Number (no) no.393 
Page pp.51-55 
#Pages
Date of Issue 2023-02-21 (DC) 


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