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Technical Committee on VLSI Design Technologies (VLD)  (Searched in: 2010)

Search Results: Keywords 'from:2010-05-19 to:2010-05-19'
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Search Results: Conference Papers
 Conference Papers (Available on Advance Programs)  (Sort by: Date Ascending)
 Results 1 - 10 of 10  /   
Committee Date Time Place Paper Title / Authors Abstract Paper #
VLD, IPSJ-SLDM 2010-05-19
15:30		 Fukuoka Kitakyushu International Conference Center High-Level Synthesis with Floorplan for GDR Architectures and its Evaluation
Akira Ohchi, Nozomu Togawa, Masao Yanagisawa, Tatsuo Ohtsuki (Waseda Univ.) VLD2010-1		  [more] VLD2010-1
pp.19-24
VLD, IPSJ-SLDM 2010-05-19
16:10		 Fukuoka Kitakyushu International Conference Center Highly Accurate Approximate Methods for Soft Error Tolerance Estimation for Sequential Circuits
Naoki Shirobayashi, Yusuke Akamine, Masayoshi Yoshimura, Yusuke Matsunaga (Kyushu Univ.) VLD2010-2		 Soft error tolerance estimation method is necessary for soft error
aware logic designs. There is an exact method has b... [more]		 VLD2010-2
pp.25-30
VLD, IPSJ-SLDM 2010-05-19
16:35		 Fukuoka Kitakyushu International Conference Center An Approximate Method for Steady State Probability Calculation based on FSM Splitting
So Hasegawa, Yusuke Akamine, Masayoshi Yoshimura, Yusuke Matsunaga (Kyushu Univ.) VLD2010-3		 An exact method evaluate soft error tolerance with Markov model
has been proposed. This method, however, is difficult t... [more]		 VLD2010-3
pp.31-36
VLD, IPSJ-SLDM 2010-05-19
17:00		 Fukuoka Kitakyushu International Conference Center Error Propagation Probability-based Selective TMR for Reliable Coarse-Grained Reconfigurable Architecture
Hiroshi Yuasa, Takashi Imagawa, Masayuki Hiromoto, Hiroyuki Ochi, Takashi Sato (Kyoto Univ.) VLD2010-4		 Advancing CMOS process technology implies decreasing operating voltages, leaving LSI increasingly vulnerable to temporar... [more] VLD2010-4
pp.37-42
VLD, IPSJ-SLDM 2010-05-20
10:00		 Fukuoka Kitakyushu International Conference Center 3D System Integration of Processor and Multi-Stacked SRAMs Using Inductive-Coupling Link
Makoto Saen, Kenichi Osada, Yasuyuki Okuma (Hitachi), Yasuhisa Shimazaki (Keio Univ./Renesas Technology), Itaru Nonomura (Renesas Technology), Kiichi Niitsu, Yasufumi Sugimori, Yoshinori Kohama, Kazutaka Kasuga, Tadahiro Kuroda (Keio Univ.) VLD2010-5		 This paper describes a three-dimensional (3D) system integration of a fully functional processor chip and two memory chi... [more] VLD2010-5
pp.43-47
VLD, IPSJ-SLDM 2010-05-20
10:25		 Fukuoka Kitakyushu International Conference Center Implementation of error correction method on small area and low power consumption processor for the capsular detrusor pressure measurement system
Hiroki Ohsawa, Tomohiro Kondo, Hirofumi Iwato, Keishi Sakanushi, Yoshinori Takeuchi, Masaharu Imai (Osaka Univ.) VLD2010-6		 Our research group is developing a capsular detrusor pressure measurement system.
In this system, communication errors ... [more]		 VLD2010-6
pp.49-54
VLD, IPSJ-SLDM 2010-05-20
13:05		 Fukuoka Kitakyushu International Conference Center A Wide-Range Clock Synchronizer with Predictive-Delay-Adjustment Scheme for Continuous Voltage Scaling in DVFS Control
Masafumi Onouchi, Yusuke Kanno, Makoto Saen, Shigenobu Komatsu (Hitachi), Yoshihiko Yasu, Koichiro Ishibashi (Renesas) VLD2010-7		 A ``wide-range voltage-and-frequency clock synchronizer'' for maintaining synchronization during voltage-scaling transit... [more] VLD2010-7
pp.67-72
VLD, IPSJ-SLDM 2010-05-20
13:30		 Fukuoka Kitakyushu International Conference Center Temperature-dependent model for break-even time in fine-grain power gating and adaptive control based on the temperature dependence
Kimiyoshi Usami, Tatsunori Hashida (Shibaura Inst. Tech.) VLD2010-8		  [more] VLD2010-8
pp.73-78
VLD, IPSJ-SLDM 2010-05-20
13:55		 Fukuoka Kitakyushu International Conference Center An Efficient Congested Area Specification And Congestion Relaxation by 45 Degree Line for Single Layer Printed Circuit Board Rouitng
Kyosuke Shinoda (Tokyo Tech), Yukihide Kohira (UoA), Atsushi Takahashi (Osaka Univ.) VLD2010-9		 In recent VLSI systems, system performance increases while system size reduces. In Printed Circuit
Board (PCB) design, ... [more]		 VLD2010-9
pp.79-84
VLD, IPSJ-SLDM 2010-05-20
14:20		 Fukuoka Kitakyushu International Conference Center Variation Modeling of Current Sources by D/A Converter Analysis
Bo Liu, Qing Dong, Bo Yang, Shigetoshi Nakatake (Univ. of Kitakyushu) VLD2010-10		  [more] VLD2010-10
pp.85-89
 Results 1 - 10 of 10  /   
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